Silicon carbide semiconductor substrate and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-2016233080-A1
Application number	US-201415024110-A
Country	US
Kind code	A1
Filing date	Aug 11, 2014
Priority date	Sep 25, 2013
Publication date	Aug 11, 2016
Grant date	—

Abstract

A silicon carbide semiconductor substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of not more than 700 μm. A dislocation density is not more than 500/mm 2 at an arbitrary region having an area of 1 mm 2 in a region within 5 mm from an outer circumferential end portion of the first main surface toward a center of the first main surface. Accordingly, there is provided a silicon carbide semiconductor substrate allowing for suppression of generation of cracks.

First claim

1 . A silicon carbide semiconductor substrate comprising a first main surface and a second main surface opposite to the first main surface,
the first main surface having a maximum diameter of more than 100 mm, the silicon carbide semiconductor substrate having a thickness of not more than 700 μm, a dislocation density being not more than 500/mm 2 at an arbitrary region having an area of 1 mm 2 in a region within 5 mm from an outer circumferential end portion of the first main surface toward a center of the first main surface.

2 . The silicon carbide semiconductor substrate according to claim 1 , wherein when at least either of one or more crystal grain boundaries and one or more dislocation arrays exist in a region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 5 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, and
when neither of the crystal grain boundaries and the dislocation arrays exist in the region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 500/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 5 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

3 . The silicon carbide semiconductor substrate according to claim 1 , wherein the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 5 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

4 . The silicon carbide semiconductor substrate according to claim 3 , wherein
when at least either of one or more crystal grain boundaries and one or more dislocation arrays exist in a region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 100/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 5 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, and when neither of the crystal grain boundaries and the dislocation arrays exist in the region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 5 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

5 . The silicon carbide semiconductor substrate according to claim 1 , wherein the dislocation density is not more than 500/mm 2 at an arbitrary region having an area of 1 mm 2 in a region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

6 . The silicon carbide semiconductor substrate according to claim 5 , wherein
when at least either of one or more crystal grain boundaries and one or more dislocation arrays exist in a region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, and when neither of the crystal grain boundaries and the dislocation arrays exist in the region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 500/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

7 . The silicon carbide semiconductor substrate according to claim 5 , wherein the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

8 . The silicon carbide semiconductor substrate according to claim 7 , wherein
when at least either of one or more crystal grain boundaries and one or more dislocation arrays exist in a region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 100/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, and when neither of the crystal grain boundaries and the dislocation arrays exist in the region of 1 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface, the dislocation density is not more than 200/mm 2 at the arbitrary region having an area of 1 mm 2 in the region within 10 mm from the outer circumferential end portion of the first main surface toward the center of the first main surface.

9 . The silicon carbide semiconductor substrate according to claim 1 , wherein the silicon carbide semiconductor substrate includes: a silicon carbide single crystal substrate that constitutes the second main surface; and a silicon carbide epitaxial layer that is provided on the silicon carbide single crystal substrate and that constitutes the first main surface.

10 . The silicon carbide semiconductor substrate according to claim 1 , wherein the maximum diameter of the first main surface is not less than 150 mm.

11 . The silicon carbide semiconductor substrate according to claim 1 , wherein the thickness of the silicon carbide semiconductor substrate is not more than 600 μm.

12 . A method for manufacturing a silicon carbide semiconductor substrate comprising steps of:
preparing a silicon carbide semiconductor substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximum diameter of more than 100 mm, the silicon carbide semiconductor substrate having a thickness of not more than 700 μm; and removing a circumferential edge portion of the silicon carbide semiconductor substrate, in the step of removing the circumferential edge portion, the circumferential edge portion being removed such that a position of a first center of the first main surface of the silicon carbide semiconductor substrate before removing the circumferential edge portion does not match with a position of a second center of the first main surface of the silicon carbide semiconductor substrate after removing the circumferential edge portion, and such that the second center is located in the first main surface at a region within 15° relative to a straight line obtained by projecting, on the first main surface, a straight line passing through the first center and parallel to a <1-100> direction when viewed from the first center.

13 . The method for manufacturing the silicon carbide semiconductor substrate according to claim 12 , further comprising a step of specifying a region having a stacking fault by observing the first main surface of the silicon carbide semi

Assignees

• Sumitomo Electric Industries

Inventors

• Tanaka So
• Okita Kyoko
• Nishiguchi Taro
• Kubota Ryosuke
• Kanbara Kenji

Classifications

• H10P14/3408

  Silicon carbide · CPC title

• H10P14/2926

  Crystal orientations · CPC title

• H10P14/2904

  Silicon carbide · CPC title

• H10P90/128 Primary

  by edge treatment, e.g. chamfering · CPC title

• H10D62/117

  Shapes of semiconductor bodies · CPC title