Inductor array chip and dc-to-dc converter module using the same

Patent metadata

Field	Value
Publication number	US-2016233017-A1
Application number	US-201615132888-A
Country	US
Kind code	A1
Filing date	Apr 19, 2016
Priority date	Oct 29, 2013
Publication date	Aug 11, 2016
Grant date	—

Abstract

Coil conductor patterns CP 31 to CP 34 and CP 41 to CP 44 are formed to be close to an outermost layer of a multilayer body. The coil conductor patterns CP 31 and CP 41 are connected by via hole conductors VH 111 b and VH 111 c , the coil conductor patterns CP 32 and CP 42 are connected by via hole conductors VH 112 b and VH 112 c , the coil conductor patterns CP 33 and CP 43 are connected by via hole conductors VH 113 b and VH 113 c , and the coil conductor patterns CP 34 and CP 44 are connected by via hole conductors VH 114 b and VH 114 c . Coil conductor patterns CP 101 to CP 104 and CP 111 to CP 114 formed to be close to the other outermost layer of the multilayer body are also connected in the same manner.

First claim

1 . An inductor array chip comprising:
a multilayer body formed by laminating a plurality of ceramic sheets, wherein at least some of the plurality of ceramic sheets have magnetism; and a plurality of inductors provided in the multilayer body, wherein each of the plurality of inductors includes:
a plurality of coiled conductors provided between the plurality of ceramic sheets, wherein each of the plurality of inductors has a same number of the plurality of coiled conductors;
a first via hole conductor spirally connecting the plurality of coiled conductors; and
a second via hole conductor additionally connecting at least two coiled conductors of the plurality of coiled conductors located close to an outermost layer of the multilayer body, and connecting a part of the at least two coiled conductors in parallel or in a short-circuit manner, and
at least one of the plurality of inductors has an inductance value different from inductance values of other inductors.

2 . The inductor array chip according to claim 1 ,
wherein the second via hole conductor is provided at a position different from starting end positions and terminating end positions of the coiled conductors.

3 . The inductor array chip according to claim 1 ,
wherein the first via hole conductor is provided at a position different from the second via hole conductor.

4 . The inductor array chip according to claim 1 ,
wherein the second via hole conductors are provided at each of a position close to one outermost layer of the multilayer body and a position close to another outermost layer of the multilayer body.

5 . The inductor array chip according to claim 1 ,
wherein respective positions of the plurality of coiled conductors in a lamination direction are different between at least two of the plurality of inductors.

6 . A DC-to-DC converter module comprising:
a multilayer body formed by laminating a plurality of ceramic sheets, wherein at least some of the plurality of ceramic sheets have magnetism; a plurality of inductors provided in the multilayer body; and a switching IC mounted on the multilayer body and connected to the plurality of inductors, wherein each of the plurality of inductors includes:
a plurality of coiled conductors provided between the plurality of ceramic sheets, wherein each of the plurality of inductors has a same number of the plurality of coiled conductors;
a first via hole conductor spirally connecting the plurality of coiled conductors; and
a second via hole conductor additionally connecting at least two coiled conductors of the plurality of coiled conductors located close to an outermost layer of the multilayer body, and connecting a part of the at least two coiled conductors in parallel or in a short-circuit manner, and
at least one of the plurality of inductors has an inductance value different from inductance values of other inductors.

7 . The DC-to-DC converter module according to claim 6 ,
wherein the second via hole conductor is provided at a position different from starting end positions and terminating end positions of the coiled conductors.

8 . The DC-to-DC converter module according to claim 6 ,
wherein the first via hole conductor is provided at a position different from the second via hole conductor.

9 . The DC-to-DC converter module according to claim 6 ,
wherein the second via hole conductors are provided at each of a position close to one outermost layer of the multilayer body and a position close to the other outermost layer of the multilayer body.

10 . The DC-to-DC converter module according to claim 6 ,
wherein respective positions of the plurality of coiled conductors in a lamination direction are different between at least two of the plurality of inductors.

Assignees

• Murata Manufacturing Co

Inventors

• Murase Motonori

Classifications

• H10W44/00

  Electrical arrangements for controlling or matching impedance · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• G05F3/08

  wherein the variable is DC · CPC title

• H01F27/2804 Primary

  Printed windings · CPC title

• H01F2017/0066

  with a magnetic layer · CPC title