Expanded distribution unit

Patent metadata

Field	Value
Publication number	US-2016232126-A1
Application number	US-201615019234-A
Country	US
Kind code	A1
Filing date	Feb 9, 2016
Priority date	Feb 10, 2015
Publication date	Aug 11, 2016
Grant date	—

Abstract

The invention relates to a method for processing real-time data in a distribution unit of a distributed computer system, the computer system comprising a plurality of node computers and distribution units, the distribution unit containing, in addition to a switching engine (SE) and a switching memory (SM), one or more application computers each with one or more application central processing units and each with one or more application memories (AM), wherein the switching engine of the distribution unit, when it receives, at one of its ports, a message intended for an application computer, forwards this message to the addressed application computer through a direct memory access (DMA) unit that is arranged between the switching memory and the application memory of the addressed application computer and that is under the control of the switching engine. The invention also relates to an expanded distribution unit and a computer system with such expanded distribution units.

First claim

1 . A method for processing real-time data in a distribution unit of a distributed computer system, said computer system comprising node computers and at least one distribution unit, said distribution unit containing a switching engine ( 130 ), a switching memory ( 140 ), and one or more application computers ( 220 , 230 ), each application computer having one or more application central processing units ( 223 , 233 ) and one or more application memories ( 222 , 232 ), wherein the switching engine ( 130 ) of the distribution unit:
receives, at one of its ports ( 121 , 122 , 123 ), a message intended for an application computer, and forwards the message to the addressed application computer ( 220 , 230 ) through a direct memory access (DMA) unit ( 221 , 231 ); said direct memory access unit being arranged between the switching memory ( 140 ) and the application memory ( 222 , 232 ) of the addressed application computer ( 220 , 230 ) and being controlled by the switching engine ( 130 ).

2 . The method of claim 1 , wherein in a time-triggered computer system, the switching engine ( 130 ) and all application computers ( 220 , 230 ) have access to a global sparse time base, and the switching engine of the distribution unit outputs, at global time points contained in a schedule created a priori, a command to a DMA unit ( 221 , 231 ) arranged between the switching memory and an application computer or to each of the DMA units ( 221 , 231 ) arranged between the switching memory and an application computer, said command instructing to start a DMA transfer of data from the switching memory to an application memory and to start a DMA transfer of data from an application memory to the switching memory.

3 . The method of claim 1 , wherein the source and destination addresses of the data that the DMA is to transport between the switching memory and an application memory, or vice versa, are contained in a schedule of the switching engine.

4 . The method of claim 1 , wherein in an event-controlled computer system, an application computer ( 220 ) communicates information about from which memory area of the application memory ( 222 ) an event-driven message is to be sent through the distribution unit over a control line ( 301 ) of the switching engine provided between the switching engine ( 130 ) and an application computer ( 220 ), and then the switching engine commands the DMA unit ( 221 ) arranged between the application computer and the switching memory to transport the specified data from the application memory ( 222 ) to the switching memory ( 140 ).

5 . The method of claim 1 , wherein during transport intervals no CPU ( 223 , 233 ) of an application computer ( 220 , 230 ) accesses the area of its memory that is affected by the transport.

6 . The method of claim 1 , wherein both time-triggered and event-driven messages are transported and processed in the distribution unit.

7 . The method of claim 1 , wherein the data is transported according to the TTEthernet protocol.

8 . A distribution unit for processing real-time data in a distributed computer system, the computer system comprising node computers and distribution units, said distribution unit comprising:
a switching engine ( 130 ); a switching memory ( 140 ) one or more application computers ( 220 , 230 ), each application computer having one or more application central processing units ( 223 , 233 ) and one or more application memories ( 222 , 232 ) DMA units ( 221 , 231 ) arranged between the switching memory ( 140 ) of the distribution unit and the application memories ( 222 , 232 ) of the application computers ( 220 , 230 ), having control lines running from the switching engine ( 130 ) of the distribution unit to each DMA unit, said control lines enabling to transport commands from the switching engine ( 130 ) to the DMA units ( 221 , 231 ), for DMA transfer of memory areas of the switching memory ( 140 ) to memory areas of an application memory and for transfer of memory areas of the application memory to memory areas of the switching memory ( 140 ).

9 . The distribution unit of claim 8 , wherein in an event-driven computer system there is provided, between the switching engine ( 130 ) and at least one application computer ( 220 ), a control line ( 301 ) for exchanging commands between the switching engine ( 130 ) and the application computer(s) ( 220 ), and, between the switching memory ( 140 ) and each application memory ( 220 , 230 ), a DMA unit ( 221 , 231 ) controlled by the switching engine ( 130 ).

10 . The distribution unit of claim 8 , wherein at least one application computer is realized as a multiprocessor system.

11 . The distribution unit of claim 8 , wherein all subsystems of the distribution unit are implemented on a single highly integrated VLSI chip.

12 . A computer system comprising multiple node computers and distribution units, wherein the computer system comprises one or more distribution units claim 8 .

13 . The distribution unit of claim 9 , wherein the control line ( 301 ) is provided between the switching engine ( 130 ) and two or more, or all, of the application computers ( 220 ).

14 . The distribution unit of claim 10 , wherein all of the application computers are realized as multiprocessor systems.

Assignees

• Fts Computertechnik Gmbh

Inventors

• Poledna Stefan
• Kopetz Hermann
• Schwarz Martin

Classifications

• H04L67/10

  in which an application is distributed across nodes in the network (software deployment G06F8/60; multiprogramming arrangements G06F9/46) · CPC title

• G06F15/17331 Primary

  Distributed shared memory [DSM], e.g. remote direct memory access [RDMA] · CPC title

• H04L49/103

  using a shared central buffer; using a shared memory · CPC title

• G06F12/1081

  for peripheral access to main memory, e.g. direct memory access [DMA] · CPC title

• H04L49/35 Primary

  Switches specially adapted for specific applications · CPC title