Suppressing Power Spikes

US2016231801A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016231801-A1
Application numberUS-201514617719-A
CountryUS
Kind codeA1
Filing dateFeb 9, 2015
Priority dateFeb 9, 2015
Publication dateAug 11, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

This document describes techniques and apparatuses for suppressing power spikes. In some embodiments, these techniques and apparatuses determine an available amount of power that a battery is capable of providing while maintaining a particular voltage level and a requisite amount of power that components will consume to perform a task. When the requisite amount of power exceeds the available amount of power, power states of the components are altered effective to enable the battery to maintain the particular voltage level.

First claim

Opening claim text (preview).

What is claimed is: 1 . A computer-implemented method comprising: determining, for an upcoming point in time, an available amount of power that a battery of a computing device is capable of providing while maintaining a particular voltage level; determining, for the upcoming point in time, a requisite amount of power that components of the computing device will consume to perform at least a portion of a task at their respective power states; and altering, responsive to determining that the requisite amount of power exceeds the available amount of power, one or more of the components' respective power states at the upcoming point in time effective to enable the battery to maintain the particular voltage level. 2 . The computer-implemented method as described in claim 1 , wherein altering the one or more of the components' respective power states comprises altering a sequence in which the task or other tasks of the device are performed effective to reduce, at the upcoming point in time, a respective power state of at least one of the components involved in performing the tasks. 3 . The computer-implemented method as described in claim 1 , wherein altering the one or more of the components' respective power states comprises reducing a respective power state of at least one of the components. 4 . The computer-implemented method as described in claim 3 , wherein reducing the one or more of the components' respective power states negatively effects performance of the task and the method further comprises increasing, at another point in time, the one or more of the components' respective power states to mitigate the effects on performance of the task. 5 . The computer-implemented method as described in claim 4 , wherein the other point in time occurs before or after the upcoming point in time at which the requisite amount of power exceeds the available amount of power. 6 . The computer-implemented method as described in claim 1 , wherein the available amount of power is determined based on an open circuit potential, internal resistance, and load current of the battery. 7 . The computer-implemented method as described in claim 1 , wherein the particular voltage level is at or above a hard cutoff voltage level or a soft cutoff voltage level at which the computing device ceases to operate and maintaining the particular voltage level is effective to enable the computing device to continue to operate while the components consume the requisite amount of power. 8 . The computer-implemented method as described in claim 1 , further comprising selecting which of the one or more of the components' respective power states to alter based on component interdependencies associated with performing the task. 9 . The computer-implemented method as described in claim 1 , further comprising selecting a degree by which to alter the one or more of the components' respective power states based on a minimum power state of a respective component at which performance of the task is enabled. 10 . A computer-implemented method comprising: receiving a request for a device to perform, in addition to other tasks being performed by the device, an additional task having a particular priority level; determining that a requisite amount of power that resources of the device will consume to perform the additional task and other tasks exceeds an available amount of power that a battery of the device can provide; determining which ones of the other tasks have respective priority levels that are lower than the particular priority level of the additional task; identifying which ones of the resources are involved in performing the other tasks having the lower respective priority levels; and altering respective power states of at least some of the resources involved in performing the other tasks having the lower respective priority levels such that the requisite power does not exceed the available amount of power when the task is performed. 11 . The computer-implemented method as described in claim 10 , further comprising altering respective power states of resources involved with performing the additional task such that the requisite power does not exceed the available amount of power when the additional task is performed. 12 . The computer-implemented method as described in claim 10 , further comprising, prior to altering the respective power states, identifying interdependencies between the resources involved with performing the other tasks having the lower respective priority levels and resources involved with performing the additional task, and wherein altering the respective power states of at least some of the resources alters respective power states of the resources involved in performing the other tasks that are not interdependent with resources involved with performing the additional task. 13 . The computer-implemented method as described in claim 10 , further comprising determining the available amount of power that the battery of the device can provide. 14 . The computer-implemented method as described in claim 10 , wherein altering respective power states of at least some of the resources includes shutting down or idling the resources involved in performing the other tasks having the lower respective priority levels. 15 . The computer-implemented method as described in claim 10 , wherein the other tasks having the lower respective priority levels are background tasks of an operating system or application. 16 . A system comprising: a battery from which the system draws power to operate; hardware-based resources by which the system performs tasks; a power manager configured to perform operations comprising: determining, for an upcoming point in time, an available amount of power that the battery is capable of providing while maintaining a particular voltage level; determining, for the upcoming point in time, a requisite amount of power that the hardware-based resources will consume to perform one of the tasks at their respective power states; and altering, responsive to determining that the requisite amount of power exceeds the available amount of power, one or more of the hardware-based resources' respective power states at the upcoming point in time effective to enable the battery to maintain the particular voltage level. 17 . The system as described in claim 16 , wherein the power manager is configured to determine the available amount of power based on a state-of-charge, internal resistance, and load current of the battery. 18 . The system as described in claim 16 , wherein altering the one or more of the hardware-based resources' respective power states negatively effects performance of the task and the power manager is further configured to restore, at another point in time, the one or more of the hardware-based resources' respective power states to mitigate the negative effects on performance of the task. 19 . The system as described in claim 16 , wherein the particular voltage level is at or above a hard cutoff voltage level or a soft cutoff voltage level at which the system device ceases to operate and maintaining the particular voltage level is effective to enable the system to continue to operate while the hardware-based resources consume the requisite amount of power. 20 . The system as described in claim 16 , wherein the hardware-based resources of the system comprise at least one of a processing resource, memory resource, display resource, graphics processing resource, communication resource, or mas

Assignees

Inventors

Classifications

  • by task scheduling · CPC title

  • by switching off individual functional units in the computer system · CPC title

  • G06F1/3212Primary

    Monitoring battery levels, e.g. power saving mode being initiated when battery voltage goes below a certain level · CPC title

  • for determining the ability of a battery to perform a critical function, e.g. cranking · CPC title

  • G06F1/3206Primary

    Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016231801A1 cover?
This document describes techniques and apparatuses for suppressing power spikes. In some embodiments, these techniques and apparatuses determine an available amount of power that a battery is capable of providing while maintaining a particular voltage level and a requisite amount of power that components will consume to perform a task. When the requisite amount of power exceeds the available am…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification G06F1/3212. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).