Overmolded replaceable light emitting diode lamp
US-2015377472-A1 · Dec 31, 2015 · US
Solder-Mask-Related Safety Accommodation Arrangement for LED Lighting Modules
US2016223167A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016223167-A1 |
| Application number | US-201514612885-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 3, 2015 |
| Priority date | Feb 3, 2015 |
| Publication date | Aug 4, 2016 |
| Grant date | — |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
An LED apparatus which includes (a) an electrical circuit board having an electrically-insulated substrate with conductive zones laminated thereon, (b) a selectively-applied dielectric layer, such as a solder-mask layer, deposited or otherwise adhered to portions of the circuit board, the dielectric layer having a thickness and material composition sufficient such that the fire and electrical enclosure requirements of UL8750, UL746E and UL746C are met, and (c) one or more LEDs connected to the circuit board at designated connection sites thereon.
First claim
Opening claim text (preview).
1 . An LED apparatus including: an electrical circuit board having an electrically-insulated substrate with conductive zones laminated thereon; a selectively-applied dielectric layer adhered to portions of the circuit board, the dielectric layer having a thickness and material composition sufficient such that the fire and electrical enclosure requirements of UL8750, UL746E and UL746C are met; and one or more LEDs connected to the circuit board at designated connection sites thereon. 2 . An LED apparatus of claim 1 wherein the selectively-applied dielectric layer is a solder mask. 3 . The LED apparatus of claim 2 wherein the solder-mask layer comprises Taiyo PSR4000 LEW3. 4 . The LED apparatus of claim 2 wherein the solder-mask layer has a thickness in excess of about 60 microns. 5 . The LED apparatus of claim 2 wherein the solder mask is applied by a silk-screening process. 6 . The LED apparatus of claim 2 wherein the region of the circuit board surrounding the LEDs is a lighting region, and the circuit board further includes non-LED electrical components on one or more areas of the circuit board outside of the lighting region. 7 . The LED apparatus of claim 6 wherein the one or more areas outside of the lighting region of the circuit board include a solder-mask layer having a thickness of not more than one-third that of the solder-mask layer on the lighting region. 8 . The LED apparatus of claim 7 wherein the solder mask is applied by a silk-screening process. 9 . The LED apparatus of claim 6 wherein the lighting region includes one or more subregions which do not include conductive zones, and the subregions include a solder-mask layer having a thickness of not more than one-third that of the solder-mask layer on the lighting region. 10 . The LED apparatus of claim 9 wherein the solder mask is applied by a silk-screening process. 11 . The LED apparatus of claim 1 wherein the selectively-applied dielectric layer is of a single material.
Assignees
Inventors
Classifications
- F21K9/90Primary
Methods of manufacture · CPC title
- F21V15/015Primary
Devices for covering joints between adjacent lighting devices; End coverings · CPC title
Mechanical Engineering · mapped topic
the substrate is supporting also the light source · CPC title
Flameproof or explosion-proof arrangements · CPC title
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Frequently asked questions
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- What does patent US2016223167A1 cover?
- An LED apparatus which includes (a) an electrical circuit board having an electrically-insulated substrate with conductive zones laminated thereon, (b) a selectively-applied dielectric layer, such as a solder-mask layer, deposited or otherwise adhered to portions of the circuit board, the dielectric layer having a thickness and material composition sufficient such that the fire and electrical e…
- Who is the assignee on this patent?
- Cree Inc
- What technology area does this patent fall under?
- Primary CPC classification F21K9/90. Mapped technology areas include Mechanical Engineering.
- When was this patent published?
- Publication date Thu Aug 04 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).