Semiconductor switch

Patent metadata

Field	Value
Publication number	US-2016190231-A1
Application number	US-201514842405-A
Country	US
Kind code	A1
Filing date	Sep 1, 2015
Priority date	Dec 27, 2014
Publication date	Jun 30, 2016
Grant date	—

Abstract

According to an embodiment, a semiconductor switch includes a first insulating film on a semiconductor substrate, a first semiconductor layer on the first insulating film, a semiconductor switch circuit on the first semiconductor layer, and a wiring on the first insulating film. The first insulating film being between the wiring and the substrate. The wiring connects the semiconductor switch circuit and a terminal. A polycrystalline semiconductor layer is between the wiring and the first insulating film.

First claim

What is claimed is:

1 . A semiconductor switch, comprising:
a first insulating film on a semiconductor substrate; a first semiconductor layer on the first insulating film; a semiconductor switch circuit on the first semiconductor layer; a wiring on the first insulating film, the first insulating film being between the wiring and the semiconductor substrate and connecting the semiconductor switch circuit and a terminal; and a polycrystalline semiconductor layer between the wiring and the first insulating film.

2 . The semiconductor switch according to claim 1 , wherein a carrier concentration of the polycrystalline semiconductor layer is 1E20 cm −3 or higher.

3 . The semiconductor switch according to claim 1 , wherein the polycrystalline semiconductor layer is covered by a second insulating film.

4 . The semiconductor switch according to claim 3 , wherein the polycrystalline semiconductor layer is connected to a power supply potential through a via passing through the second insulating film.

5 . The semiconductor switch according to claim 1 , wherein the polycrystalline semiconductor layer is a polysilicon layer.

6 . The semiconductor switch according to claim 5 , wherein a silicide material is provided on the polysilicon layer.

7 . The semiconductor switch according to claim 1 , wherein the polycrystalline semiconductor layer extends in a direction parallel to the semiconductor substrate beyond an outer edge of the wiring.

8 . The semiconductor switch according to claim 1 , further comprising:
a conductive cylinder connecting the polycrystalline semiconductor layer and the semiconductor substrate.

9 . The semiconductor switch according to claim 1 , further comprising:
a charge trap level layer at an interface between the semiconductor substrate and the first insulating film, the charge trap level layer having a charge trap level concentration in a range of approximately 1E16 cm −3 to approximately 1E18 cm −3 .

10 . The semiconductor switch according to claim 9 , wherein the charge trap level layer is a semiconductor layer containing electrically inactive impurities.

11 . A semiconductor switch, comprising:
a first insulating film on a semiconductor substrate; a first semiconductor layer on the first insulating film; a semiconductor switch circuit on the first semiconductor layer; a wiring on the first insulating film, the first insulating film being between the wiring and the semiconductor substrate, the wiring connecting the semiconductor switch circuit and a terminal; and a second semiconductor layer between the wiring and the semiconductor substrate and having an impurity concentration that is higher than an impurity concentration of the first semiconductor layer.

12 . The semiconductor switch according to claim 11 , wherein a mobility of a carrier in the second semiconductor layer is lower than a mobility of a carrier in the semiconductor substrate.

13 . The semiconductor switch according to claim 11 , wherein the second semiconductor layer is a polycrystalline semiconductor layer.

14 . A semiconductor switch, comprising:
a first insulating film on a semiconductor substrate; a first semiconductor layer on the first insulating film; a semiconductor switch circuit on the first semiconductor layer; a wiring on the first insulating film, the first insulating film being between the wiring and the semiconductor substrate, the wiring connecting the semiconductor switch circuit and a terminal; and a conductive layer on the first insulating film, the conductive layer being insulated and separated from the wiring by a second insulating film, the conductive layer having a floating potential and being electrically charged.

15 . The semiconductor switch according to claim 14 , wherein the conductive layer is between the wiring and the first insulating film.

16 . The semiconductor switch according to claim 14 , further comprising:
an electrode configured to perform tunnel injection of electrons into the conductive layer.

Assignees

• Toshiba Kk

Inventors

• Ishimaru Atsushi
• Nagaoka Masami

Classifications

• H10P34/40 Primary

  with high-energy radiation · CPC title

• H10D86/201

  the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence) · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H01L29/04 Primary

  Electricity · mapped topic