Gate driver for providing variable gate-off voltage and display device including the same

US2016189654A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016189654-A1
Application numberUS-201514715792-A
CountryUS
Kind codeA1
Filing dateMay 19, 2015
Priority dateDec 24, 2014
Publication dateJun 30, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel includes: a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels; a gate driver connected to the plurality of gate lines to apply a gate signal voltage; a data driver connected to the plurality of data lines to apply a data voltage and a negative data voltage; and a gate voltage divider for generating a gate signal voltage including gate-on and gate-off voltages to provided it to the gate driver. The gate voltage divider adjusts the gate-off voltage in accordance with a driving time of the display panel and a temperature of the display panel.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels; a gate driver connected to the plurality of gate lines to apply a gate signal voltage; a data driver connected to the plurality of data lines to apply a data voltage and a negative data voltage; and a gate voltage divider generating the gate signal voltage including a gate-on voltage and a gate-off voltage to provided it to the gate driver, wherein the gate voltage divider adjusts the gate-off voltage in accordance with a driving time of the display panel and a temperature of the display panel. 2 . The display device of claim 1 , wherein the gate voltage divider includes: a driving time-reflecting unit providing a voltage to be adjusted according to the driving time of the display panel; a temperature-reflecting unit providing a voltage to be adjusted according to the temperature of the display panel; and a voltage adjuster outputting a voltage calculated by subtracting the voltages provided by the driving time-reflecting unit and the temperature-reflecting unit from a reference gate-off voltage. 3 . The display device of claim 2 , wherein the driving time-reflecting unit includes: a monitoring oscillator (OSC) monitoring the driving time of the display panel; a programmable setting outputting a preset voltage in response to the driving time provided by the monitoring OSC; and a driving time-reflecting voltage provider providing an analog voltage corresponding to the voltage provided by the programmable setting to the voltage adjuster. 4 . The display device of claim 2 , wherein the temperature-reflecting unit includes a first resistor and a second resistor, and a variable resistor that is connected to the first resistor in series and to the second resistor in parallel. 5 . The display device of claim 4 , wherein the variable resistor is a negative temperature coefficient (NTC) resistor. 6 . The display device of claim 2 , wherein the driving time-reflecting unit determines the voltage to be adjusted by reflecting both performance deterioration of the thin film transistor according to elapse of the driving time of the display panel and performance restoration of the thin film transistor according to elapse of an operation stoppage time of the display panel. 7 . The display device of claim 6 , wherein the driving time-reflecting unit includes: a monitoring OSC monitoring the driving time of the display panel and an operation stoppage time; a programmable setting outputting a preset voltage in response to the driving time and the operation stoppage time provided by the monitoring OSC; and a driving time-reflecting voltage provider providing an analog voltage corresponding to the voltage provided by the programmable setting to the voltage adjuster. 8 . A gate driving device comprising: a gate driver outputting a gate signal voltage including gate-on and gate-off voltages driving thin film transistors formed in a display panel; and a gate voltage divider generating the gate signal voltage to provide it to the gate driver, wherein the gate voltage divider adjusts the gate-off voltage in accordance with a driving time of the display panel and a temperature of the display panel. 9 . The gate driving device of claim 8 , wherein the gate voltage divider includes: a driving time-reflecting unit providing a voltage to be adjusted according to the driving time of the display panel; a temperature-reflecting unit providing a voltage to be adjusted according to the temperature of the display panel; and a voltage adjuster outputting a voltage calculated by subtracting the voltages provided by the driving time-reflecting unit and the temperature-reflecting unit from a reference gate-off voltage. 10 . The gate driving device of claim 9 , wherein the driving time-reflecting unit includes: a monitoring OSC monitoring the driving time of the display panel; a programmable setting outputting a preset voltage in response to the driving time provided by the monitoring OSC; and a driving time-reflecting voltage provider providing an analog voltage corresponding to the voltage provided by the programmable setting to the voltage adjuster. 11 . The gate driving device of claim 9 , wherein the temperature-reflecting unit includes a first resistor and a second resistor, and a variable resistor that is connected to the first resistor in series and to the second resistor in parallel. 12 . The gate driving device of claim 11 , wherein the variable resistor is an NTC resistor. 13 . The gate driving device of claim 9 , wherein the driving time-reflecting unit determines the voltage to be adjusted by reflecting both performance deterioration of the thin film transistor according to elapse of the driving time of the display panel and performance restoration of the thin film transistor according to elapse of an operation stoppage time of the display panel. 14 . The gate driving device of claim 13 , wherein the driving time-reflecting unit includes: a monitoring OSC monitoring the driving time of the display panel and the operation stoppage time; a programmable setting outputting a preset voltage in response to the driving time and the operation stoppage time provided by the monitoring OSC; and a driving time-reflecting voltage provider providing an analog voltage corresponding to the voltage provided by the programmable setting to the voltage adjuster.

Assignees

Inventors

Classifications

  • for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels (display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127) · CPC title

  • Compensation of deficiencies in the appearance of colours · CPC title

  • Temperature compensation · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • G09G3/3685Primary

    Details of drivers for data electrodes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016189654A1 cover?
A display panel includes: a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels; a gate driver connected to the plurality of gate lines to apply a gate signal voltage; a data driver connected to the plurality of data lines to apply a data voltage and a negative data voltage; and a gate voltage divider for generating a gate signal voltage inclu…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3685. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).