Display device

US2016189585A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016189585-A1
Application numberUS-201514733416-A
CountryUS
Kind codeA1
Filing dateJun 8, 2015
Priority dateDec 31, 2014
Publication dateJun 30, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes: a first pixel including a display element, a pixel circuit to provide a driving signal to the display element, a first transistor to control a connection between the pixel circuit and the display element, and a second transistor to control a connection between the display element and a repair line; a second pixel including a repair circuit to provide the driving signal to the repair line; and a repair control element connected to first and second control lines that are connected to gate electrodes of the first and second transistors, respectively, and configured to control the first and second transistors according to a repair control signal provided by a controller.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a first pixel comprising a display element, a pixel circuit to provide a driving signal to the display element, a first transistor to control a connection between the pixel circuit and the display element, and a second transistor to control a connection between the display element and a repair line; a second pixel comprising a repair circuit to provide the driving signal to the repair line; and a repair control element connected to first and second control lines that are connected to gate electrodes of the first and second transistors, respectively, and configured to control the first and second transistors according to a repair control signal provided by a controller. 2 . The display device of claim 1 , wherein the controller is configured to provide the repair control signal as a low-level voltage or a high-level voltage at intervals of a single horizontal period, and the repair control element is further configured to turn off the first transistor and turn on the second transistor in response to the repair control signal with the high-level voltage. 3 . The display device of claim 2 , wherein the repair control element is further configured to turn off the second transistor and turn on the first transistor in response to the repair control signal with the low-level voltage. 4 . The display device of claim 2 , wherein the display element is configured to receive the driving signal from the repair circuit via the second transistor. 5 . The display device of claim 1 , further comprising a display panel having a display area to display an image and a non-display area that surrounds the display area, wherein the first pixel is in the display area and the second pixel is in the non-display area. 6 . The display device of claim 5 , wherein the repair control element is in the non-display area. 7 . The display device of claim 1 , wherein the controller is configured to provide the repair control signal with a high-level voltage concurrently with a scan signal being applied to the first pixel. 8 . The display device of claim 1 , wherein the repair control element comprises: third through fifth transistors each having a first electrode connected to a repair control line configured to receive the repair control signal; a sixth transistor having a second electrode connected to the repair control line and configured to turn on by an i-th scan signal being applied to the first pixel; a seventh transistor having a gate electrode connected to a first electrode of the sixth transistor, a first electrode configured to receive a first control signal with a low-level voltage, and a second electrode connected to the first control line; an eighth transistor having a gate electrode connected to a second electrode of the third transistor, a second electrode configured to receive a second control signal with the low-level voltage, and a first electrode connected to the second control line; a first capacitor connected between the second electrode of the third transistor and a second electrode of the fourth transistor; and a second capacitor connected between the second electrode and the gate electrode of the seventh transistor. 9 . The display device of claim 8 , wherein the third transistor is configured to turn on by an (i−1)-th scan signal preceding the i-th scan signal, the fourth transistor is configured to turn on by the i-th scan signal, and the fifth transistor is configured to turn on by an (i+1)-th scan signal following the i-th scan signal. 10 . The display device of claim 9 , wherein after a defect occurs in the pixel circuit of the first pixel, the controller is configured to sequentially output the repair control signal with the low-level voltage, the repair control signal with a high-level voltage, and the repair control signal with the low-level voltage concurrently with the (i−1)-th scan signal, the i-th scan signal, and the (i+1)-th scan signal, respectively. 11 . The display device of claim 8 , wherein the seventh transistor is configured to turn off by the repair control signal with a high-level voltage being provided thereto via the sixth transistor. 12 . The display device of claim 1 , wherein the driving signal is a driving current and the display element is an organic light-emitting diode (OLED). 13 . The display device of claim 1 , wherein the driving signal is a driving voltage and the display element is a liquid crystal element comprising a pixel electrode, a common electrode configured to form an electric field with the pixel electrode, and a liquid crystal layer whose alignment is configured to vary according to the electric field. 14 . The display device of claim 1 , wherein the first and second transistors are p-channel field effect transistors (FETs). 15 . A display device comprising: a display panel including a display area in which a plurality of pixels are arranged and a dummy pixel area in which a plurality of dummy pixels are arranged, wherein each of the pixels comprises a display element and a pixel circuit to drive the display element, and each of the dummy pixels comprises a repair circuit having a same structure as the pixel circuit; a scan driver to provide a scan signal to the display panel; a repair controller to cut off a connection between the pixel circuit and the display element of one of the pixels where a defect has occurred according to a repair control signal output at intervals of a single horizontal period as a low-level voltage or a high-level voltage, and configured to connect the display element of the defective one of the pixels to the repair circuit of a corresponding one of the dummy pixels; and a controller to control the scan driver and output the repair control signal. 16 . The display device of claim 15 , wherein the controller is configured to provide the repair control signal with the high-level voltage concurrently with a scan signal being applied to the one of the pixels. 17 . The display device of claim 15 , wherein the repair controller is configured to cut off the connection between the pixel circuit and the display element of each pixel of a row of the pixels including the one of the pixels, and to connect the display elements of the pixels of the row of the pixels to the repair circuits of corresponding ones of the dummy pixels. 18 . The display device of claim 15 , wherein the dummy pixel area is in a non-display area that surrounds the display area. 19 . The display device of claim 15 , wherein a connection between the pixel circuit and the display element of the defective one of the pixels is configured to be cut off in response to the repair control signal with the high-level voltage, and the display element of the defective one of the pixels is further configured to connect to the repair circuit of the corresponding one of the dummy pixels. 20 . The display device of claim 15 , wherein the display panel comprises a plurality of scan lines and a plurality of data lines that define the pixels, the repair controller comprises a repair control line to provide the repair control signal, and a plurality of repair control elements connected to the repair control line, and the repair control elements correspond to the scan lines and are configured to control a corresponding plurality of rows of pixels connected to respective ones of the scan lines.

Assignees

Inventors

Classifications

  • Flexible displays · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • Details of dummy pixels or dummy lines in flat panels · CPC title

  • G09G3/20Primary

    for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

  • for flexible display surfaces · CPC title

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Frequently asked questions

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What does patent US2016189585A1 cover?
A display device includes: a first pixel including a display element, a pixel circuit to provide a driving signal to the display element, a first transistor to control a connection between the pixel circuit and the display element, and a second transistor to control a connection between the display element and a repair line; a second pixel including a repair circuit to provide the driving signa…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).