Digital Signal Processor

Patent metadata

Field	Value
Publication number	US-2016188293-A1
Application number	US-201514964817-A
Country	US
Kind code	A1
Filing date	Dec 10, 2015
Priority date	Dec 31, 2014
Publication date	Jun 30, 2016
Grant date	—

Abstract

A processor configured to: receive, at a floating-point-input-terminal, an input-block of data comprising a plurality of floating-point numbers each floating-point number comprising a mantissa and an exponent; determine an input-scale-factor based on a previous-input-block-exponent-value associated with a previous-input-block of data; and convert the input-block of data into a fixed-point-block of data in accordance with the input-scale-factor, wherein the fixed-point-block of data comprises a plurality of fixed-point-values that can represent the plurality of floating-point numbers within a particular range.

First claim

1 . A processor configured to:
receive, at a floating-point-input-terminal, an input-block of data comprising a plurality of floating-point numbers each floating-point number comprising a mantissa and an exponent; determine an input-scale-factor based on a previous-input-block-exponent-value associated with a previous-input-block of data; and convert the input-block of data into a fixed-point-block of data in accordance with the input-scale-factor, wherein the fixed-point-block of data comprises a plurality of fixed-point-values that can represent the plurality of floating-point numbers within a particular range.

2 . The processor of claim 1 , further configured to:
set an out-of-range-indicator if the magnitude of one or more of the plurality of floating-point numbers is outside the particular range that can be represented by the fixed point number, for the input-scale-factor that was used; and if the out-of-range-indicator is set, then convert the input-block of data into a revised-fixed-point-block of data in accordance with a revised-input-scale-factor.

3 . The processor of claim 2 , further configured to:
detect and store a maximum-input-exponent-value of the plurality of floating-point numbers; and set the revised-input-scale-factor as the maximum-input-exponent-value.

4 . The processor of claim 1 , further configured to:
detect and store a maximum-input-exponent-value of the plurality of floating-point numbers; set an overflow-indicator if one or more of the plurality of floating-point numbers is above the particular range; set an underflow-indicator if one or more of the plurality of floating-point numbers is below the particular range; if the overflow-indicator and the underflow-indicator are not set, then set pre-processed-output-data as the fixed-point-block of data; if the overflow-indicator or the underflow-indicator is set, then:
convert the input-block of data into a revised-block-fixed-point-block of data in accordance with the maximum-input-exponent-value; and
set pre-processed-output-data as the revised-block-fixed-point-block of data; and
provide the pre-processed-output-data to a block-fixed-point-output-terminal.

5 . The processor of claim 1 , configured to convert the plurality of floating-point numbers sequentially.

6 . The processor of claim 1 , configured to detect the maximum-input-exponent-value during the conversion of the plurality of floating-point numbers.

7 . The processor of claim 1 , configured to set the underflow-indicator if:
one or more of the plurality of fixed-point-values is less than a predetermined threshold within the particular range; or each of the plurality of fixed-point-values are below a predetermined threshold within the particular range.

8 . The processor of claim 1 , further configured to:
set a previous-input-block-underflow-indicator if one or more of a plurality of fixed-point-values relating to a previous-input-block of data is less than a predetermined threshold within a previous-input-block-range; and determine the input-scale-factor in accordance with the previous-input-block-underflow-indicator.

9 . The processor of claim 1 , further configured to:
set a previous-input-block-overflow-indicator if one or more of a plurality of fixed-point-values relating to a previous-input-block of data is greater than a predetermined threshold within a previous-input-block-range; and determine the input-scale-factor in accordance with the previous-input-block-overflow-indicator.

10 . The processor of claim 1 , wherein the conversion of the plurality of floating-point numbers comprises:
an alignment step for each floating-point number in which each mantissa is stored in a load-register in accordance with a difference between each exponent and the input-scale factor; and a rounding step in which each mantissa stored in the load register is rounded to provide the plurality of fixed-point-values.

11 . The processor of claim 1 , wherein the block-fixed-point-output-terminal is configured to provide the pre-processed-output-data to a fixed-point-digital-signal-processor for processing in accordance with an algorithm to generate processed-block-fixed-point-output-data, and wherein the processor is further configured to:
receive, at a block-fixed-point-input-terminal, the processed-block-fixed-point-output-data; determine an output-scale-factor; convert the processed-block-fixed-point-output-data into a plurality of processed-fixed-point numbers in accordance with the output-scale-factor; provide, to an output-floating-point-data-terminal, output-floating-point-data based on the processed-fixed-point numbers.

12 . The processor of claim 11 , configured to determine the output-scale-factor in accordance with an amplification-factor based on the algorithm and:
the input-scale-factor, if an overflow-indicator and an underflow-indicator are not set; or the maximum-input-exponent-value, if the overflow-indicator or the underflow-indicator is set.

13 . The processor of claim 11 , further configured to:
detect and store a maximum-output-exponent-value of the plurality of processed-fixed-point numbers; and determine the input-scale-factor in accordance with a previous-maximum-output-exponent-value associated with a previous-input-block of data.

14 . An apparatus comprising a plurality of the processors of claim 11 , wherein each processor is configured to determine an input-scale-factor and an output-scale-factor for use by the respective processor.

15 . A method for controlling a processor, the method comprising:
receiving an input-block of data comprising a plurality of floating-point numbers, each floating-point number comprising a mantissa and an exponent; determining an input-scale-factor based on a previous-input-block-exponent-value associated with a previous-input-block of data; and converting the input-block of data into a fixed-point-block of data in accordance with the input-scale-factor, wherein the fixed-point-block of data comprises a plurality of fixed-point-values that can represent the plurality of floating-point numbers within a particular range.

Assignees

• Nxp Bv

Inventors

• Barat Quesada Francisco

Classifications

• G06F7/483

  Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers {(G06F7/4806, G06F7/4824, G06F7/49, G06F7/491, G06F7/544 take precedence)} · CPC title

• G06F5/012 Primary

  in floating-point computations · CPC title

• H03M7/24

  Conversion to or from floating-point codes · CPC title