Method for interrupting cleaning procedure of flash memory

US2016188233A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016188233-A1
Application numberUS-201514632135-A
CountryUS
Kind codeA1
Filing dateFeb 26, 2015
Priority dateDec 26, 2014
Publication dateJun 30, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A controller for interfacing between a host and a flash memory is provided. The flash memory includes a plurality of data blocks and a plurality of spare blocks. The controller includes a memory unit and a computation unit. The computation unit is configured to perform a cleaning procedure of the flash memory, wherein whenever the computation unit has finished copying a valid page of a source block in the plurality of data blocks to a spare page of a destination block in the plurality of spare blocks during the cleaning procedure, the computation unit determines whether a request is coming from the host, if so, the computation unit suspends the cleaning procedure and responds to the request from the host, if not, the computation unit continues the cleaning procedure.

First claim

Opening claim text (preview).

What is claimed is: 1 . A controller for interfacing between a host and a flash memory, wherein the flash memory comprises a plurality of data blocks and a plurality of spare blocks, the controller comprising: a memory unit; and a computation unit, configured to perform a cleaning procedure on the flash memory, wherein whenever the computation unit has finished copying a valid page of a source block in the plurality of data blocks to a spare page of a destination block in the plurality of spare blocks during the cleaning procedure, the computation unit determines whether a request is coming from the host, if so, the computation unit suspends the cleaning procedure and responds to the request from the host, if not, the computation unit continues the cleaning procedure. 2 . The controller as claimed in claim 1 , wherein the computation unit further determines whether the valid page is the last page of the source block before determining whether the request is coming from the host. 3 . The controller as claimed in claim 2 , wherein the controller further stops the cleaning procedure when the valid page is the last page of the source block. 4 . The controller as claimed in claim 1 , wherein the request from the host is a write command or a read command to the flash memory. 5 . The controller as claimed in claim 1 , wherein the controller further continues the cleaning procedure after performing operations of the request from the host. 6 . A method for interrupting a cleaning procedure of a flash memory, wherein the flash memory comprises a plurality of data blocks and a plurality of spare blocks, the method comprising: determining whether a request is coming from the host whenever a valid page of a source block in the plurality of data blocks has been copied to a spare page of a destination block in the plurality of spare blocks during the cleaning procedure; if so, suspending the cleaning procedure and responding to the request from the host, if not, continuing the cleaning procedure. 7 . The method as claimed in claim 6 , further comprising: determining whether the valid page is the last page of the source block before determining whether the request is coming from the host. 8 . The method as claimed in claim 7 , further comprising: stopping the cleaning procedure when the valid page is the last page of the source block. 9 . The method as claimed in claim 6 , wherein the request from the host is a write command or a read command to the flash memory. 10 . The method as claimed in claim 6 , further comprising: continuing the cleaning procedure after performing operations of the request from the host. 11 . A data storage device, comprising: a flash memory comprising plurality of data blocks and a plurality of spare a controller, interfacing between a host and the flash memory, wherein the controller comprises: a memory unit; and a computation unit, configured to perform a cleaning procedure on the flash memory, wherein whenever the computation unit has finished copying a valid page of a source block in the plurality of data blocks to a spare page of a destination block in the plurality of spare blocks during the cleaning procedure, the computation unit determines whether a request is coming from the host, if so, the computation unit suspends the cleaning procedure and responds to the request from the host, if not, the computation unit continues the cleaning procedure. 12 . The data storage device as claimed in claim 11 , wherein the computation unit further determines whether the valid page is the last page of the source block before determining whether the request is coming from the host. 13 . The data storage device as claimed in claim 12 , wherein the controller further stops the cleaning procedure when the valid page is the last page of the source block. 14 . The data storage device as claimed in claim 11 , wherein the request from the host is a write command or a read command to the flash memory. 15 . The data storage device as claimed in claim 11 , wherein the controller further continues the cleaning procedure after performing operations of the request from the host.

Assignees

Inventors

Classifications

  • Management of blocks · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • G06F3/0619Primary

    in relation to data integrity, e.g. data losses, bit errors · CPC title

  • G06F3/0659Primary

    Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • in relation to response time · CPC title

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What does patent US2016188233A1 cover?
A controller for interfacing between a host and a flash memory is provided. The flash memory includes a plurality of data blocks and a plurality of spare blocks. The controller includes a memory unit and a computation unit. The computation unit is configured to perform a cleaning procedure of the flash memory, wherein whenever the computation unit has finished copying a valid page of a source b…
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification G06F3/0619. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).