Non-Volatile Memory Systems Utilizing Storage Address Tables

US2016188206A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016188206-A1
Application numberUS-201414584315-A
CountryUS
Kind codeA1
Filing dateDec 29, 2014
Priority dateDec 29, 2014
Publication dateJun 30, 2016
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Non-volatile memory systems utilizing storage address tables are disclosed. A non-volatile memory system may include a non-volatile memory, a memory die command manager in communication with the memory, and a command manager in communication with the memory die command manager. The memory die command manager is configured to identify a free die of the memory to store data, where the free die of the memory is identified independent of a host logical block address associated with the data; store the data at a physical block address at the free die; and generate an entry in a first address table, the first address table associating the physical block address with a virtual logical block address. The command manager is configured to generate an entry in a second address table, the second address table associating the virtual logical block address with a host logical block address received with the host write command.

First claim

Opening claim text (preview).

We claim: 1 . A non-volatile memory system comprising: non-volatile memory; a memory die command manager in communication with the non-volatile memory, the memory die command manager configured to: identify a free die of the non-volatile memory to store data, where the free die of the non-volatile memory is identified independent of a host logical block address associated with the data; store the data at a physical block address at the free die; and generate an entry in a first address table, the first address table associating the physical block address with a virtual logical block address; and a command manager in communication with the memory die command manager, the command manager configured to generate an entry in a second address table, the second address table associating the virtual logical block address with a host logical block address received with a host write command. 2 . The non-volatile memory system of claim 1 , wherein the non-volatile memory comprises a silicon substrate and a plurality of memory cells forming at least two memory layers vertically disposed with respect to each other to form a monolithic three-dimensional structure, wherein at least one layer is vertically disposed with respect to the silicon substrate. 3 . The non-volatile memory system of claim 2 , wherein the command manager and the memory die command manager are on the same substrate as the memory cells. 4 . The non-volatile memory system of claim 1 , where the non-volatile memory system is embedded in a host. 5 . The non-volatile memory system of claim 1 , where the non-volatile memory system is removably connectable to a host. 6 . The non-volatile memory system of claim 1 , wherein the command manager is further configured to: receive, from a host, the host write command with the associated data, the host write command associated with the host logical block address; buffer the data; determine that a sufficient amount of host data is stored in the buffer to complete the writeable unit; and communicate a command request to the memory die command manager after determining that the sufficient amount of host data is stored in the buffer to complete a writeable unit, the command request comprising a size and a location of the buffered data. 7 . The non-volatile memory system of claim 1 , wherein the writeable unit is an amount of data that can be programmed in parallel within one die of memory. 8 . The non-volatile memory system of claim 1 , wherein the memory die command manager is further configured to adjust the entry in the first address table after performing a garbage collection operation such that a second physical block address for the free die is associated with the virtual logical block address, wherein the entry in the second address table associated with the virtual logical block address does not reflect a change in the physical block address associated with the virtual logical block address. 9 . The non-volatile memory system of claim 1 , wherein the command manager is further configured to translate a second host logical block address, received from a host in association with a host read command, to a second virtual logical block address, the second virtual logical block address comprising a logical die address and a logical block address at the die, and to send a command to the memory die command manager to read data stored at the second virtual logical block address; and wherein the memory die command manager is further configured to translate the second virtual logical block address to a physical die address and a physical block address at the die of the non-volatile memory and retrieve the data stored at the second virtual logical block address. 10 . The non-volatile memory system of claim 8 , wherein the command manager is configured to translate the second host logical block address to the second virtual block address utilizing the second address table; and wherein the memory die command manager is configured to translate the second virtual logical block address to the physical die address and the physical block at the physical die address utilizing the first address table. 11 . A method for managing data, the method comprising: in a non-volatile memory system comprising a non-volatile memory, a memory die command manager in operative communication with the non-volatile memory, and a command manager in operative communication with the memory die command manager: receiving at the command manger a host write command with associated data, the host write command associated with a host logical block address; buffering the data; communicating a command request from the command manager to the memory die command manager, the command request comprising a size and a location of the buffered data; identifying a free die with the memory die command manager; storing the buffered data at a physical block address at the free die; generating an entry in a first address table, the first address table containing the physical block address associated with a virtual logical block address; communicating the virtual logical block address to the command manager; and generating an entry in a second address table, the entry in the second address table associating the virtual logical block address with the host logical block address. 12 . The method of claim 11 , further comprising: determining that a sufficient amount of host data is stored in the buffer to complete the writeable unit; wherein the command manager communicates the command request to the memory die command manager after determining that the sufficient amount of host data is stored in the buffer to complete a writeable unit. 13 . The method of claim 11 , further comprising: adjusting the entry in the first address table after performing a garbage collection operation such that a second physical block address for the free die is associated with the virtual logical block address, wherein the entry in the second address table does not reflect a change in the physical block address associated with the virtual logical block address. 14 . The method of claim 11 , further comprising: receiving at the command manager a host read command from the host, where the host read command is associated with a second host logical bock address; translating, with the command manager, the second host logical block address to a second virtual logical block address, the second virtual logical block address comprising a logical die address and a logical block address at the die; sending a command from the command manager to the memory die command manager to read data stored at the second virtual logical block address; translating, with the memory die command manager, the second virtual logical block address to a physical die address and a physical block address at the die of the non-volatile memory; retrieving the data stored at the second virtual logical block address; and transmitting the data stored at the second virtual logical block address to the host. 15 . The method of claim 14 , wherein the command manager translates the second host logical block address to the second virtual block address utilizing the second address table; and wherein the memory die command manager translates the second virtual logical block address to the physical die address and the physical block at the physical die address utilizing the first address table. 16 . The method of claim 11 , wherein the non-volatile memory comprises a silicon substrate and a plurality of memory cells forming at least two memory layers vertically

Assignees

Inventors

Classifications

  • Garbage collection, i.e. reclamation of unreferenced memory · CPC title

  • G06F3/061Primary

    Improving I/O performance · CPC title

  • Conservative garbage collection · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

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What does patent US2016188206A1 cover?
Non-volatile memory systems utilizing storage address tables are disclosed. A non-volatile memory system may include a non-volatile memory, a memory die command manager in communication with the memory, and a command manager in communication with the memory die command manager. The memory die command manager is configured to identify a free die of the memory to store data, where the free die of…
Who is the assignee on this patent?
Sandisk Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G06F12/0253. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).