Method and apparatus to control a link power state

Patent metadata

Field	Value
Publication number	US-2016187952-A1
Application number	US-201414582741-A
Country	US
Kind code	A1
Filing date	Dec 24, 2014
Priority date	Dec 24, 2014
Publication date	Jun 30, 2016
Grant date	—

Abstract

A method is provided for controlling a link. This may include determining a condition of a first device coupled to the link, receiving, at the first device, a request for a specific link state from a second device coupled to the link, and determining a power state of the link based on the determined condition of the first device.

First claim

What is claimed is:

1 . A method of controlling a link comprising:
determining a condition of a first device coupled to the link; receiving, at the first device, a request for a specific link state from a second device coupled to the link; and determining a power state of the link based on the determined condition of the first device.

2 . The method of claim 1 , wherein determining the condition of the first device includes determining an idle condition of the first device.

3 . The method of claim 2 , wherein determining the power state includes determining a power off state of the link based on the determined idle condition of the first device.

4 . The method of claim 1 , wherein determining the condition of the first device includes determining an active condition of at least one component of the first device.

5 . The method of claim 4 , wherein determining the power state includes determining a power on state of the link based on the determined active condition of at least one component of the first device.

6 . The method of claim 1 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

7 . An electronic apparatus comprising:
first logic, at least a portion of which is hardware, to determine a condition of a first device; and second logic, at least a portion of which is hardware, to determine a power state of a link based on the determined condition of the first device.

8 . The electronic apparatus of claim 7 , wherein the first logic to determine an idle condition of the first device.

9 . The electronic apparatus of claim 8 , wherein the second logic to determine a power off state of the link based on the determined idle condition of the first device.

10 . The electronic apparatus of claim 7 , wherein the first logic to determine an active condition of at least one component of the first device.

11 . The electronic apparatus of claim 10 , wherein the second logic to determine a power on state of the link based on the determined active condition of at least one component of the first device.

12 . The electronic apparatus of claim 7 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

13 . The electronic apparatus of claim 7 , wherein the power state of the link is a power off state of the link or a power on state of the link.

14 . A machine-readable medium comprising one or more instructions that when executed cause a processor to perform one or more operations to:
determine a condition of a first device coupled to a link; and determine a power state of the link based on the determined condition of the first device.

15 . The machine-readable medium of claim 14 , wherein the one or more operations to include to determine an idle condition of the first device.

16 . The machine-readable medium of claim 15 , wherein the one or more operations to include to determine a power off state of the link based on the determined idle condition of the first device.

17 . The machine-readable medium of claim 14 , wherein the one or more operations to include to determine an active condition of at least one component of the first device.

18 . The machine-readable medium of claim 17 , wherein the one or more operations to include to determine a power on state of the link based on the determined active condition of at least one component of the first device.

19 . The machine-readable medium of claim 14 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

20 . The machine-readable medium of claim 14 , wherein the one or more operations to include to control power to the link based on the determined power state of the link.

Assignees

• Intel Corp

Inventors

• Gough Corey D
• Steiner Ian M
• Sistla Krishnakanth V

Classifications

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• G06F1/3253

  Power saving in bus · CPC title

• G06F1/28 Primary

  Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title