Two-stage error amplifier with nested-compensation for ldo with sink and source ability

Patent metadata

Field	Value
Publication number	US-2016187902-A1
Application number	US-201514592040-A
Country	US
Kind code	A1
Filing date	Jan 8, 2015
Priority date	Dec 29, 2014
Publication date	Jun 30, 2016
Grant date	—

Abstract

A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

First claim

1 . A low dropout amplifier, comprising:
an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively, and configured to generate first and second error signals at first and second outputs, respectively, the first and second error signals based upon a difference between the reference signal and the feedback signal; a sink stage coupled to the first output and configured to generate a sink current based upon the first error signal; a source stage coupled to the second output and configured to generate a source current based upon the second error signal; and an output node coupled to receive the sink and source currents.

2 . The low dropout amplifier of claim 1 , further comprising a load coupled to the output node; wherein the sink stage is configured to output the sink current based upon the feedback signal indicating that a current through the load is within a threshold of zero; and wherein the source stage is configured to generate the source current based upon the feedback signal indicating that a current through the load is within a threshold of zero.

3 . The low dropout amplifier of claim 1 , further comprising a load coupled to the output node; and wherein the sink stage is configured to generate the sink current based upon the feedback signal indicating that a current through the load is negative.

4 . The low dropout amplifier of claim 1 , further comprising a load coupled to the output node; and wherein the source stage is configured to generate the source current based upon the feedback signal indicating that a current through the load is positive.

5 . The low dropout amplifier of claim 1 , wherein the sink stage comprises:
a transistor having a control terminal coupled to the first output to receive the first error signal, a first conduction terminal coupled to a first power supply node, and a second conduction terminal, the transistor configured to generate a current from its second conduction terminal based upon the first error signal; a sink current mirror coupled to the second conduction terminal of the transistor and the output node, and configured to mirror the current as the sink current applied to the output node.

6 . The low dropout amplifier of claim 1 , wherein the source stage comprises:
a transistor having a control terminal coupled to the second output to receive the second error signal, a first conduction terminal coupled to a second power supply node, and a second conduction terminal, the transistor configured to generate a current from its second conduction terminal based upon the second error signal; a source current mirror coupled to the second conduction terminal of the transistor and the output node, and configured to mirror the current to the output node as the source current.

7 . The low dropout amplifier of claim 1 , further comprising a first feedback network coupled between the first output and the second input, a second feedback network coupled between the second output and the second input, and a third feedback network coupled between the output node and the second input.

8 . The low dropout amplifier of claim 1 , wherein the error amplifier comprises:
a differential input stage including the first input and the second input, the differential input stage configured to generate a comparison signal based upon a difference between the reference signal at the first input and the feedback signal at the second input; at least one gain stage coupled to an input of the differential input stage and configured to amplify the comparison signal; a differential output stage coupled to the at least one gain stage and configured to output the first and second error signals based upon the comparison signal.

9 . The low dropout amplifier of claim 8 , wherein the at least one gain stage comprises a first gain stage coupled to the input of the differential input stage, and a second gain stage coupled to the first gain stage; wherein the differential input stage has a tail; and wherein the different output stage is coupled between the tail and the second gain stage.

10 . The low dropout amplifier of claim 8 , wherein the differential input stage has a tail; and wherein the differential output stage comprises:
first and second voltage drop circuits; a first output stage transistor having a first conduction terminal coupled to the tail and to the first output, a second conduction terminal coupled to the at least one gain stage and to the second output, and a control terminal coupled to the first voltage drop circuit; and a second output stage transistor having a first conduction terminal coupled to the tail and to the first output, a second conduction terminal coupled to the at least one gain stage and to the second output, and a control terminal coupled to the second voltage drop circuit.

11 . The low dropout amplifier of claim 10 , wherein at least one of the first and second voltage drop circuits comprises a diode coupled transistor coupled in series with a fixed current source.

12 . An error amplifier, comprising:
a differential input stage including a first input coupled to receive a first signal, a second input coupled to receive a second signal, and a tail, the differential input stage configured to generate a comparison signal based upon a difference between the first signal and the second signal; at least one gain stage coupled to the differential input stage and configured to amplify the comparison signal; a differential output stage having first and second outputs, and configured to generate first and second error signals at the first and second outputs based upon the comparison signal, and comprising:
first and second voltage drop circuits,
a first output stage transistor having a first conduction terminal coupled to the tail and to the first output, a second conduction terminal coupled to the at least one gain stage and to the second output, and a control terminal coupled to the first voltage drop circuit, and
a second output stage transistor having a first conduction terminal coupled to the tail and to the first output, a second conduction terminal coupled to the at least one gain stage and to the second output, and a control terminal coupled to the second voltage drop circuit.

13 . The error amplifier of claim 12 , wherein the at least one gain stage comprises a first gain stage coupled to the differential input stage, and a second gain stage coupled to the first gain stage; wherein the differential input stage has a tail; and wherein the different output stage is coupled between the tail and the second gain stage.

14 . The error amplifier of claim 12 , wherein at least one of the first and second voltage drop circuits comprises a diode coupled transistor coupled in series with a fixed current source.

15 . A circuit, comprising:
an error amplifier having first and second inputs and first and second outputs; a sink stage coupled to the first output, the sink stage comprising:
a sink transistor having a control terminal coupled to the first output, a first conduction terminal coupled to a first power supply node, and a second conduction terminal, and
a sink current mirror coupled to the second conduction terminal of the sink transistor and an output node;
a source stage coupled to the second output, the source stage comprising:
a source transistor having a control terminal coupled to the second output, a first conduction terminal coupled to a second power supply node, and a second conduction terminal, and
a source current mirror coupled to the second conduction terminal of the source transisto

Assignees

• Stmicroelectronics Shenzhen R&D Co Ltd

Inventors

• Zeng Ni

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title