Reducing trace length and insertion loss of high speed signals on a network switch board

US2016183402A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016183402-A1
Application numberUS-201414581962-A
CountryUS
Kind codeA1
Filing dateDec 23, 2014
Priority dateDec 23, 2014
Publication dateJun 23, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electrical device can include a printed circuit board (PCB), an electrical component integrated therewith, and connectors that are each integrated with a certain edge of the PCB. Traces can provide electrical channels between the connectors and the electrical component. Some of the connectors can be integrated at a first edge of the PCB and within a first plane, and other connectors can be integrated at a second edge of the PCB and within a second plane that is distinct from the first plane.

First claim

Opening claim text (preview).

What is claimed is: 1 . An electrical device for facilitating transmission of electrical signals, the electrical device comprising: a printed circuit board (PCB); an electrical component integrated with the PCB; a first plurality of connectors integrated with a first edge of the PCB and spatially positioned substantially in parallel to each other within a first plane; a first plurality of traces integrated with the PCB and configured to provide a first electrical channel between the electrical component and the first plurality of connectors; a second plurality of connectors integrated with a second edge of the PCB and spatially positioned substantially in parallel to each other within a second plane that is distinct from the first plane; and a second plurality of traces integrated with the PCB and configured to provide a second electrical channel between the electrical component and second plurality of connectors. 2 . The electrical device of claim 1 , wherein the electrical component is a network switch chip. 3 . The electrical device of claim 1 , wherein either or both of the first and second pluralities of connectors are input/output (I/O) connectors. 4 . The electrical device of claim 1 , wherein either or both of the first and second pluralities of traces are copper traces on the PCB. 5 . The electrical device of claim 1 , wherein the first and second planes are separated by a distance of 1.5 inches. 6 . The electrical device of claim 1 , further comprising: a third plurality of connectors integrated with a third edge of the PCB and spatially positioned substantially in parallel to each other within a third plane that is distinct from the first plane; and a third plurality of traces integrated with the PCB and configured to provide a third electrical channel between the electrical component and the third plurality of connectors. 7 . The electrical device of claim 6 , wherein the first and third planes are separated by a distance of 1.5 inches. 8 . A network switch apparatus, comprising: a housing; a printed circuit board (PCB) mounted within the housing; a network switch chip integrated with the PCB; a first plurality of input/output (I/O) connectors integrated with a first face of the housing and spatially positioned substantially in parallel to each other within a first plane; a first plurality of traces integrated with the PCB and configured to provide a first electrical channel between the network switch chip and the first plurality of I/O connectors; a second plurality of I/O connectors integrated with a second face of the housing and spatially positioned substantially in parallel to each other within a second plane that is distinct from the first plane; and a second plurality of traces integrated with the PCB and configured to provide a second electrical channel between the network switch chip and the second plurality of I/O connectors. 9 . The network switch apparatus of claim 8 , wherein either or both of the first and second pluralities of traces are copper traces on the PCB.ng 10 . The network switch apparatus of claim 8 , wherein the first and second planes are separated by a distance of 1.5 inches. 11 . The network switch apparatus of claim 8 , further comprising: a third plurality of I/O connectors integrated with a third face of the housing and spatially positioned substantially in parallel to each other within a third plane that is distinct from the first plane; and a third plurality of traces integrated with the PCB and configured to provide a third electrical channel between the network switch chip and the third plurality of connectors. 12 . The network switch apparatus of claim 11 , wherein the first and third planes are separated by a distance of 1.5 inches. 13 . The network switch apparatus of claim 11 , wherein the second and third planes are the same plane. 14 . A rack system, comprising: a housing; a printed circuit board (PCB) mounted within the housing; at least one other component mounted within the housing, an outermost edge of the at least one other component spatially positioned substantially within a first plane; a network switch chip integrated with the PCB; a first plurality of input/output (I/O) connectors integrated with a first face of the housing and spatially positioned substantially in parallel to each other within the first plane such that the first plurality of I/O connectors are substantially flush with the outermost edge of the at least one other component; a first plurality of traces integrated with the PCB and configured to provide a first electrical channel between the network switch chip and the first plurality of I/O connectors; a second plurality of I/O connectors integrated with a second face of the housing and spatially positioned substantially in parallel to each other within a second plane that is recessed from the first plane; and a second plurality of traces integrated with the PCB and configured to provide a second electrical channel between the network switch chip and the second plurality of I/O connectors. 15 . The rack system of claim 14 , wherein the first and second planes are separated by a distance of 1.5 inches. 16 . The rack system of claim 14 , further comprising: a third plurality of I/O connectors integrated with a third face of the housing and spatially positioned substantially in parallel to each other within a third plane that is recessed from the first plane; and a third plurality of traces integrated with the PCB and configured to provide a third electrical channel between the network switch chip and the third plurality of connectors. 17 . The net rack system of claim 16 , wherein the first and third planes are separated by a distance of 1.5 inches. 18 . The rack system of claim 16 , wherein the second and third planes are the same plane.

Assignees

Inventors

Classifications

  • H05K7/1492Primary

    having electrical distribution arrangements, e.g. power supply or data communications · CPC title

  • H04L49/30Primary

    Peripheral units, e.g. input or output ports · CPC title

  • characterized by the mounting of blades therein, e.g. brackets, rails, trays (H05K7/1491 takes precedence) · CPC title

  • H05K1/117Primary

    Pads along the edge of rigid circuit boards, e.g. for pluggable connectors · CPC title

  • Uniform resistance, i.e. equalizing the resistance of a number of conductors · CPC title

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Frequently asked questions

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What does patent US2016183402A1 cover?
An electrical device can include a printed circuit board (PCB), an electrical component integrated therewith, and connectors that are each integrated with a certain edge of the PCB. Traces can provide electrical channels between the connectors and the electrical component. Some of the connectors can be integrated at a first edge of the PCB and within a first plane, and other connectors can be i…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H05K7/1492. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).