Method, apparatus and computer program for digital transmission of messages

US2016182109A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016182109-A1
Application numberUS-201615057737-A
CountryUS
Kind codeA1
Filing dateMar 1, 2016
Priority dateJan 25, 2013
Publication dateJun 23, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments relate to a controller operable to transmit digital data messages to a receiver via a communication link having at least a first and a second transmission path, the controller comprising a first signal terminal the first transmission path and a second signal terminal for the second transmission path. The first signal terminal is operable to digitally transmit a first message to the receiver according to a first transmission technique and the second signal terminal is being operable to digitally transmit a second message to the receiver according to a second, different transmission technique.

First claim

Opening claim text (preview).

1 . A receiver operable to receive digital data messages from a controller via a communication link having at least a first and a second transmission path, the receiver comprising: a first receive signal terminal for the first transmission path, the first receive signal terminal being operable to digitally receive a first message from the controller according to a first transmission technique; and a second receive signal terminal for the second transmission path, the second receive signal terminal being operable to digitally receive a second message from the controller according to a second, different transmission technique. 2 . A receiver according to claim 1 , configured to receive at least one message of the group of the first message and the second message, the at least one message being transmitted using a serial transmission protocol using signals of varying width to represent digital content. 3 . A receiver according to claim 2 , wherein a digital quantity is represented by two consecutive signal pulses received at the receiver with a time difference of a predetermined number of common clock time intervals, the predetermined number being related to the digital quantity. 4 . A receiver according to claim 2 , wherein a common clock time interval for the reception according to the serial transmission protocol is signaled from the controller to the receiver using a preamble to a content of a transmitted message, wherein a time difference between two signal pulses in the preamble corresponds to an integer multiple of the common clock time interval. 5 . A receiver according to claim 5 , wherein a content received at the receiver by means of the first and the second message is identical. 6 . A receiver according to claim 5 , wherein an order of bits received at the first receive signal terminal, the order of bits representing the content in the first message is different from an order of bits received at the second receive signal terminal, the order of bits received at the second receive signal terminal representing the identical content in the second message. 7 . A receiver according to claim 5 , wherein the length of a first sequence of bits received at the first receive signal terminal representing the content in the first message and of a second sequence of bits received at the second receive signal terminal used to receive the identical content in the second message is identical, wherein the bit value of each bit at a given position in the first sequence is the inverse of the bit value of the bit at the same position in the second sequence. 8 . A receiver according to claim 1 , wherein the communication link comprises a data bus comprising at least a first bus line for the first transmission path and a second bus line for the second transmission path. 9 . A receiver according to claim 8 , wherein the receiver uses a variation of a voltage on the first receive signal terminal to receive the first message according to the first transmission technique. 10 . A receiver according to claim 8 , wherein the receiver uses a variation of a current on the second receive signal terminal to receive the second message according to the second transmission technique. 11 . A receiver according to claim 2 , wherein the digital serial transmission protocol corresponds to the SPC (Short PWM Code) or the SENT (Single Edge Nibble Transmission) protocol. 12 . A receiver according to claim 11 , wherein both messages of the group are transmitted according to the SPC or the SENT protocol. 13 . A receiver according to claim 11 , wherein the receiver is further operable to selectively work in a first operating mode using only the first transmission technique or in a second operating mode using only the second transmission technique. 14 . A receiver according to claim 13 , wherein the receiver is further operable to evaluate a signal condition on the first receive signal terminal; and to enter the first or the second operating mode upon occurrence of a predetermined condition on the first receive signal terminal. 15 . A receiver according to claim 14 , wherein the predetermined condition is the exceeding of a predetermined voltage level on the first receive signal terminal.

Assignees

Inventors

Classifications

  • H04B1/16Primary

    Circuits · CPC title

  • H04L1/22Primary

    using redundant apparatus to increase reliability · CPC title

  • by scheduling the transmission of messages at the communication node · CPC title

  • Bus networks · CPC title

  • Microcontroller · CPC title

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Frequently asked questions

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What does patent US2016182109A1 cover?
Embodiments relate to a controller operable to transmit digital data messages to a receiver via a communication link having at least a first and a second transmission path, the controller comprising a first signal terminal the first transmission path and a second signal terminal for the second transmission path. The first signal terminal is operable to digitally transmit a first message to the …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H04B1/16. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 23 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).