Formation of solder and copper interconnect structures and associated techniques and configurations

Patent metadata

Field	Value
Publication number	US-2016181217-A1
Application number	US-201414581825-A
Country	US
Kind code	A1
Filing date	Dec 23, 2014
Priority date	Dec 23, 2014
Publication date	Jun 23, 2016
Grant date	—

Abstract

Embodiments of the present disclosure are directed toward formation of solder and copper interconnect structures and associated techniques and configurations. In one embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a solderable material on the IC substrate using an ink deposition process, a binder printing system, or a powder laser sintering system. In another embodiment, a method includes providing an integrated circuit (IC) substrate and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure. Other embodiments may be described and/or claimed.

First claim

1 . A method comprising:
providing an integrated circuit (IC) substrate; and depositing a solderable ink on the IC substrate using an ink deposition process; and reflowing the deposited solderable ink to form one or more solder bumps on the IC substrate, wherein a first solder bump of the one or more solder bumps has a size that is different than a size of a second solder bump of the one or more solder bumps.

2 . The method of claim 1 , wherein the solderable ink includes a solder powder mixed with a flux material.

3 . (canceled)

4 . The method of claim 1 , wherein the solderable ink includes a solder powder mixed with a stabilizing binder that is stable at room temperature and configured to decompose at an elevated temperature above the room temperature.

5 . The method of claim 1 , wherein:
the IC substrate includes a contact; providing the IC substrate comprises providing a die, wafer, or package substrate; and depositing the solderable ink comprises depositing the solderable material on the contact using an ink jet printer according to a computer-aided design (CAD) file.

6 . A method comprising:
providing an integrated circuit (IC) substrate; and depositing a solderable material on the IC substrate using a binder printing system.

7 . The method of claim 6 , wherein depositing the solderable material comprises:
spreading solder powder on the IC substrate; and selectively depositing a binder material on the solder powder to form one or more scaffold structures of the solder powder held together by the binder material at locations on the IC substrate where one or more solder bumps are to be formed.

8 . The method of claim 7 , further comprising:
removing solder powder that is not held together by the binder material; and iteratively performing actions of spreading the solder powder, selectively depositing the binder material and removing the solder powder until a desired dimension of the one or more scaffold structures is achieved.

9 . The method of claim 7 , wherein the binder material comprises a sacrificial tack binder that is stable at room temperature and configured to decompose at an elevated temperature above the room temperature.

10 . The method of claim 6 , further comprising:
reflowing the deposited solderable material to form one or more solder bumps on the IC substrate.

11 . A method comprising:
providing an integrated circuit (IC) substrate; and depositing a solderable material on the IC substrate using a powder laser sintering system.

12 . The method of claim 11 , wherein depositing the solderable material on the IC substrate is performed using a powder-jet laser sintering system by selectively depositing solder powder to a sintering area in a path of a laser at locations where one or more solder bumps are to be formed.

13 . The method of claim 12 , further comprising:
sintering the deposited solderable material using the laser to form the one or more solder bumps on the IC substrate.

14 . The method of claim 13 , wherein the sintering is performed in the presence of a reducing agent in a gas that is used to deliver the solder powder to the sintering area.

15 . The method of claim 11 , wherein depositing the solderable material on the IC substrate is performed using a powder-bed laser sintering system by spreading solder powder on the IC substrate, the IC substrate being disposed in a bed.

16 . The method of claim 15 , further comprising:
sintering, by a laser, the deposited solderable material at locations on the IC substrate to form one or more solder bumps at the locations.

17 . The method of claim 16 , further comprising:
subsequent to the sintering, removing excess solder powder from the IC substrate.

18 . A method comprising:
providing an integrated circuit (IC) substrate; and depositing a copper powder on the IC substrate using an additive process to form a copper interconnect structure.

19 . The method of claim 18 , wherein depositing the copper powder comprises using an ink printing process to deposit the copper powder in a carrier fluid on the IC substrate.

20 . The method of claim 19 , further comprising:
curing the deposited copper powder to form the copper interconnect structure.

21 . The method of claim 20 , wherein the curing is performed in a reducing atmosphere comprising formic acid.

22 . The method of claim 18 , wherein depositing the copper powder comprises using a powder-jet laser sintering system to deposit the copper powder.

23 . The method of claim 18 , further comprising:
sintering the copper powder with a laser to form the copper interconnect structures.

24 . The method of claim 23 , wherein the sintering is performed in the presence of a reducing agent entrained in a gas flow of the copper powder during the depositing of the copper powder.

25 . The method of claim 23 , wherein the sintering is performed in the presence of an adhesion promoter to promote adhesion of the sintered copper interconnect structures to the IC substrate.

26 . The method of claim 1 , wherein:
the IC substrate includes a contact; providing the IC substrate comprises providing a die, wafer, or package substrate; and depositing the solderable ink comprises depositing the solderable material on the contact using an aerosol jet printing system according to a computer-aided design (CAD) file.

Assignees

• Intel Corp

Inventors

• Prack Edward R

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W72/073

  of die-attach connectors · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title