Asymmetrical bus keeper
US-9209808-B2 · Dec 8, 2015 · US
US2016178705A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016178705-A1 |
| Application number | US-201514705600-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 6, 2015 |
| Priority date | Dec 23, 2014 |
| Publication date | Jun 23, 2016 |
| Grant date | — |
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An apparatus may include one or more registers configured to store a plurality of values, and an analog-to-digital converter (ADC). Each value of the plurality of values may correspond to a characteristic of a transistor at a respective temperature value. The ADC may be configured to generate a digital value corresponding to a difference in voltage levels between a first terminal and a second terminal of the transistor. The apparatus may further include a sensor configured to measure a temperature, and control logic configured to generate a first voltage level at a control terminal of the transistor and receive the digital value from the ADC. The control logic may be further configured to determine, during a first operational mode, a current passing through the transistor dependent upon the digital value, at least one value of the plurality of values, and the temperature.
Opening claim text (preview).
What is claimed is: 1 . An apparatus comprising: one or more registers configured to store a plurality of values, wherein each value of the plurality of values corresponds to a characteristic of a transistor at a respective one of a plurality of temperature values; an analog-to-digital converter (ADC) configured to generate a first digital value corresponding to a difference in voltage levels between a first terminal and a second terminal of the transistor; a sensor configured to measure a temperature; and control logic configured to: generate a control voltage level at a control terminal of the transistor; receive the first digital value from the ADC; and determine, during a first operational mode, a current passing through the transistor dependent upon the first digital value, at least one value of the plurality of values, and the temperature. 2 . The apparatus of claim 1 , wherein the control logic is further configured to: determine, during a second operational mode, that the temperature is at a higher temperature value than each of the plurality of values stored in the one or more registers; determine, during the second operational mode, a new value for the characteristic of the transistor; and replace, in the one or more registers, at least one value of the plurality of values with the new value. 3 . The apparatus of claim 1 , wherein the control logic is further configured to: determine, during a second operational mode, that the temperature is at a lower temperature value than each of the plurality of values stored in the one or more registers; determine, during the second operational mode, a new value for the characteristic of the transistor; and replace, in the one or more registers, at least one value of the plurality of values with the new value. 4 . The apparatus of claim 3 , wherein the second operational mode corresponds to a battery charging mode. 5 . The apparatus of claim 4 , wherein to determine a new value for the characteristic of the transistor, the control logic is further configured to receive a value of a charging current from a charger circuit. 6 . The apparatus of claim 1 , wherein to generate the control voltage level at the control terminal of the transistor, the control logic is further configured to enable a charge pump. 7 . The apparatus of claim 6 , wherein the charge pump is further configured to adjust the first voltage level at the control terminal of the transistor dependent upon a voltage level of an output of the charge pump. 8 . A method, comprising: generating a first voltage level at a first terminal of a transistor during a first operational mode; measuring a difference between a second voltage level of a second terminal of the transistor and a third voltage level of a third terminal of the transistor; measuring a temperature; retrieving, from one or more registers, at least one value of a plurality of values, wherein each value of the plurality of values corresponds to a characteristic of the transistor at a respective one of a plurality of temperature values; and determining a current passing through the transistor dependent upon the difference between the second voltage level and the third voltage level, the temperature, and the at least one value. 9 . The method of claim 8 , further comprising: determining, during a second operational mode, that the temperature is at a lower temperature value than each of the plurality of values stored in the one or more registers; determining, during the second operational mode, a new value for the characteristic of the transistor; and replacing, in the one or more registers, at least one value of the plurality of values with the new value. 10 . The method of claim 8 , further comprising: determining, during a second operational mode, that the temperature is at a higher temperature value than each of the plurality of values stored in the one or more registers; determining, during the second operational mode, a new value for the characteristic of the transistor; and replacing, in the one or more registers, at least one value of the plurality of values with the new value. 11 . The method of claim 10 , wherein the second operational mode corresponds to a battery charging mode. 12 . The method of claim 8 , wherein generating the first voltage level at the first terminal of the transistor further comprises enabling a charge pump. 13 . The method of claim 12 , further comprising adjusting the first voltage level dependent upon a measurement of the first voltage level. 14 . The method of claim 8 , wherein the characteristic of the transistor corresponds to a resistance between the second terminal of the transistor and the third terminal of the transistor. 15 . A system comprising: a transistor, wherein a first terminal of the transistor is coupled to a power supply unit and a second terminal of the transistor is coupled to a power supply terminal of a circuit; and a power management circuit coupled to the transistor, wherein the power management circuit is configured to: store, in one or more registers, a plurality of values wherein each value of the plurality of values corresponds to a characteristic of the transistor at a respective one of a plurality of temperature values; generate a first voltage level at a third terminal of the transistor; measure a temperature; measure a difference between a second voltage level at the first terminal and a third voltage level at the second terminal; and determine, during a first operational mode, a current flowing through the transistor dependent upon the difference, the temperature, and at least one value of the plurality of values. 16 . The system of claim 15 , wherein the power management circuit is further configured to adjust the first voltage level dependent upon a measured value of the first voltage level. 17 . The system of claim 15 , wherein the power supply unit includes at least one battery. 18 . The system of claim 15 , wherein the power management circuit is further configured to: determine, during a second operational mode, that the temperature has been determined at a lower temperature value than each of the plurality of values stored in the one or more registers; determine, during the second operational mode, a new value for the characteristic of the transistor, wherein a predetermined current passes through the transistor in the second operational mode; and replace at least one value of the plurality of values with the new value. 19 . The system of claim 15 , wherein the power management circuit is further configured to: determine, during a second operational mode, that the temperature has been determined at a higher temperature value than each of the plurality of values stored in the one or more registers; determine, during the second operational mode, a new value for the characteristic of the transistor, wherein a predetermined current passes through the transistor in the second operational mode; and replace at least one value of the plurality of values with the new value. 20 . The system of claim 15 , wherein the transistor comprises a metal-oxide semiconductor field-effect transistor.
Battery or charger load switching, e.g. concurrent charging and load supply (H02J7/50 takes precedence) · CPC title
Interface arrangements · CPC title
with means for correcting the measurement for temperature or ageing · CPC title
Charging or discharging characterised by the power electronics converter · CPC title
using a clocked protocol · CPC title
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