High data rate integrated circuit with power management

Patent metadata

Field	Value
Publication number	US-2016177385-A1
Application number	US-201514965568-A
Country	US
Kind code	A1
Filing date	Dec 10, 2015
Priority date	Dec 18, 2014
Publication date	Jun 23, 2016
Grant date	—

Abstract

A sensor device includes a sensor array and a flow cell in fluid communication with the sensor array. Bias circuitry apply bias arrangements to the sensor array to produce sensor data. Peripheral circuitry coupled to the bias circuitry produces streams of data from the sensor array, the peripheral circuitry having an active mode and an idle mode. Logic to switch the peripheral circuitry between the active mode and the idle mode to control power consumption is provided. A temperature sensor may be included, and the logic can operate with feedback to switch between the active mode and the idle mode to maintain the temperature within an operating range.

First claim

1 .- 14 . (canceled)

15 . A sensor device, comprising:
a data source comprising an analog sensor array on a substrate; peripheral circuitry coupled to the sensor array to produce a plurality of streams of digital data; a plurality of transmitters on the substrate configured to receive corresponding streams of data from the data source in parallel; a temperature sensor configured to sense a temperature that correlates with the temperature of the sensor array; a sequencer which operates the data source, the peripheral circuitry and the plurality of transmitters to sample frames of data at a frame rate according an active mode and an idle mode, wherein the sequencer operates in the active mode for a first number of frames in a time interval overlapping with a flow of reactant solution and in the idle mode for a second number of frames in a time interval overlapping with an immediately following flow of wash solution; and a controller coupled with the temperature sensor and the sequencer to adjust the first and second numbers in response to the sensed temperature.

16 . The sensor device of claim 15 , wherein the analog sensor array comprises an array of chemically sensitive field effect transistors.

17 . The sensor device of claim 15 , wherein the plurality of transmitters includes at least 20 transmitters for transmitting at a data rate greater than 1 Gb per second, and is configured in at least 10 pairs.

18 . The sensor device of claim 15 , wherein the sequencer maintains transmission of data using the plurality of transmitters during the idle mode.

19 . The sensor device of claim 15 , wherein the sequencer includes logic to set operating power parameters for a circuit or circuits in the peripheral circuitry for sensing data in the active mode, and for lower power consumption during the idle mode.

20 . The sensor device of claim 15 , wherein the peripheral circuitry includes an analog-to-digital ADC converter, and the sequencer includes logic to set a first effective number of bits parameter for the analog-to-digital converter in the active mode, and a second effective number of bits parameter, lower than the first, for the analog-to-digital converter in the idle mode.

21 . The sensor device of claim 15 , wherein the peripheral circuitry includes a digital-to-analog DAC converter to produce a reference ramp signal, and the sequencer includes logic to set a DAC parking address parameter for the digital-to-analog converter in the idle mode.

22 . The sensor device of claim 15 , wherein the peripheral circuitry includes a gray code counter to produce a digital count value, and the sequencer includes logic to set a gray code counter parking address parameter in the idle mode.

23 . The sensor device of claim 15 , wherein the peripheral circuitry includes a comparator, and the sequencer includes logic to set a first comparator power level parameter in the active mode, and a second comparator power level parameter, lower than the first, in the idle mode.

24 . The sensor device of claim 15 , wherein the peripheral circuitry includes a latch for each column of the array, and the sequencer includes logic to set a latch state in the idle mode.

25 . A method for operating a sequencing system including a sensor array, comprising:
applying a sequence of alternating flows of reactant solutions during active intervals and flows of wash solutions during wash intervals; applying bias arrangements to the sensor array to produce sensor data; producing streams of sensor data from the sensor array using peripheral circuitry having an active mode and an idle mode; and switching the peripheral circuitry between the active mode and the idle mode to control power consumption.

26 . The method of claim 25 , including using feedback responsive to temperature of the array to switch between the active mode and the idle mode to maintain the temperature within an operating range.

27 . The method of claim 25 , wherein the peripheral circuitry includes:
converting, with conversion circuitry responsive to configuration parameters the sensor data into a plurality of streams of digital data; receiving, at a plurality of transmitters, corresponding streams of data from the plurality of streams from the conversion circuitry and transmitting the data to corresponding receivers; and producing, at a sequencer which operates bias circuitry, frames of sensor data at a frame rate, operates the conversion circuitry to convert the sensor data at the frame rate; and further comprising: applying a first set of one or more configuration parameters to the conversion circuitry in the active mode, and a second set of one or more configuration parameters to the conversion circuitry in the idle mode and maintaining transmission of data using the plurality of transmitters during the idle mode.

28 . The method of claim 27 , including applying a third set of one or more configuration parameters to the bias circuitry in the active mode, and a fourth set of one or more configuration parameters to the bias circuitry in the idle mode.

29 . The method of claim 27 , wherein the second set of configuration parameters is adapted to preserve operational readiness and to reduce power consumption.

30 . The method of claim 25 , including maintaining communication links with remote receivers during the active mode and the idle mode.

31 . The method of claim 25 , including:
operating in the active mode for a first number of frames in a time interval overlapping with the active interval and for a second number of frames in the idle mode in a time interval overlapping with an immediately following idle interval; and adjusting the first and second numbers to control power consumption.

32 . The method of claim 31 , wherein an average flow rate during the active interval is greater than an average flow rate during the wash interval.

33 .- 38 . (canceled)

Assignees

• Life Technologies Corp

Inventors

• Fife Keith G
• Yang Jungwook

Classifications

• G01N35/00871

  Communications between instruments or with remote terminals · CPC title

• G01N2035/00881

  network configurations · CPC title

• G01N27/4148 Primary

  Integrated circuits therefor, e.g. fabricated by CMOS processing · CPC title

• G01N27/4145

  specially adapted for biomolecules, e.g. gate electrode with immobilised receptors · CPC title

• C12Q1/6874 Primary

  involving nucleic acid arrays, e.g. sequencing by hybridisation · CPC title