Passive amplification circuit and analog-digital convertor

Patent metadata

Field	Value
Publication number	US-2016173115-A1
Application number	US-201615051193-A
Country	US
Kind code	A1
Filing date	Feb 23, 2016
Priority date	Jan 23, 2013
Publication date	Jun 16, 2016
Grant date	—

Abstract

A differential signal is amplified by passive amplification which does not a reference of a common-mode voltage. At this time, the voltage of the differential signal is passive-amplified twice before carrying out a successive approximation type analog-digital conversion operation. The passive amplification is attained by providing a plurality of capacitances which carry out a sampling operation, and switching these connection relation by using switches. Without being accompanied by the increase of the consumed power and the chip size, an influence by the noise of s comparator is reduced to a half so that the effective resolution can be increased for one bit.

First claim

What is claimed is:

1 . A passive amplification circuit comprising:
an input terminal group configured to input a differential signal; first to fourth capacitances charged with voltages of a differential signal in a sampling operation; a plurality of switches configured to switch a connection relation of the first to fourth capacitances between a first state of the sampling operation and a second state of an amplification operation; and an output terminal group configured to output the differential signal amplified in the amplification operation, wherein in the first state, the first capacitance and the second capacitance are connected in parallel and the third capacitance and the fourth capacitance are connected in parallel, wherein in the second state, the first capacitance and the second capacitance are connected in serial and the third capacitance and the fourth capacitance are connected in serial, wherein each of one end and the other end of each of the first to fourth capacitances is connected with any of supply the plurality of switches, the output terminal group, a power supply voltage and a ground voltage, wherein one end and the other end of each of the plurality of switches is connected with any of the first to fourth capacitances, the input terminal group, the output terminal group, the power supply voltage and the ground voltage, wherein the input terminal group comprises the input terminals configured to input the differential signal, wherein the output terminal group comprises the output terminals configured to output the amplified differential signal, wherein in the first state, the first capacitance and the second capacitance are connected in parallel between the ground voltage and the input terminal, wherein in the first state, the third capacitance and the fourth capacitance are connected in parallel between the input terminal and the power supply voltage, wherein in the second state, the first capacitance and the second capacitance are connected in serial between the ground voltage and the output terminal, wherein in the second state, the third capacitance and the fourth capacitance are connected in serial between the output terminal and the power supply voltage, and wherein the first capacitance and the second capacitance have an identical first capacitance value, and the third capacitance and the fourth capacitance have an identical second capacitance value.

2 . The passive amplification circuit according to claim 1 , wherein the plurality of switches comprises:
a first switch group set to a conductive state in the first state and a block-off state in the second state; and a second switch group set to the block-off state in the first state and the conductive state in the second state, wherein the one end of each of switches of the first switch group is connected with any of the input terminals of the input terminal group and the other end thereof is connected with any of the first to fourth capacitances, and wherein the one end of each of switches of the second switch group is connected with the power supply voltage or the ground voltage, and the other end thereof is connected with any of the first to fourth capacitances.

3 . The passive amplification circuit according to claim 2 , wherein the input terminal group comprises:
a positive side input terminal configured to input a positive side voltage of the differential signal; and a negative side input terminal configured to input a negative side voltage of the differential signal, wherein the output terminal group comprises: a positive side output terminal configured to output the positive side voltage of the amplified differential signal; and a negative side output terminal configured to output the negative side voltage of the amplified differential signal, wherein in the first state, the first to fourth capacitances are connected in parallel between the positive side input terminal and the negative side input terminal, wherein in the second state, the first capacitance is connected between the power supply voltage and the negative side output terminal, wherein in the second state, the second capacitance is connected between the negative side output terminal and the ground voltage, wherein in the second state, the third capacitance is connected between the power supply voltage and the positive side output terminal, wherein in the second state, the fourth capacitance is connected between the positive side output terminal and the ground voltage, and wherein the first capacitance and the third capacitance have an identical first capacitance value, and the second capacitance of the fourth capacitance have an identical second capacitance value.

4 . An analog-digital converter comprising:
an analog-digital converting circuit configured to convert an analog value into a digital value; a holding circuit provided at a front-stage of the analog-digital converting circuit to hold the analog value; and a control circuit configured to control the analog-digital converting circuit and the holding circuit, wherein the holding circuit comprises: a capacitance group configured to hold a voltage corresponding to the analog value; a switch group configured to switch a connection relation of the capacitance group and to passive-amplify the voltage; and a voltage shift circuit configured to shift a DC level of the voltage passive-amplified so as to fall within a predetermined range.

5 . The analog-digital converter according to claim 4 , wherein the capacitance group comprises:
a first capacitance; and a second capacitance connected in parallel with the first capacitance through the switch group in a first state, and connected in serial with the first capacitance through the switch group in a second state.

6 . The analog-digital converter according to claim 5 , wherein the switch group comprises:
a first switch configured to connect one end of the first capacitance to an input section of the holding circuit in a first state and to isolate the one end of the first capacitance from the input section in a second state; a second switch configured to connect one end of the second capacitance and the input section in the first state and to isolate the one end of the second capacitance from the input section in the second state; a third switch configured to isolate the one end of the first capacitance from the other end of the second capacitance in the first state and to connect the one end of the first capacitance with the other end of the second capacitance in the second state; a fourth switch configured to ground the other end of the second capacitance in the first state and isolate the other end of the second capacitance from the ground voltage in the second state; and a fifth switch configured to isolate the one end of the second capacitance from the analog-digital converting circuit in the first state and to connect the one end of the second capacitance with the analog-digital converting circuit in the second state, and wherein the other end of the first capacitance is grounded.

7 . The analog-digital converter according to claim 5 , wherein the voltage shift circuit comprises:
another capacitance group contained in the holding circuit and connected with the capacitance group; and another switch group contained in the holding circuit and configured to carry out the DC level shift by switching a connection relation of the capacitance group, the other capacitance group, and the switch group.

8 . The analog-digital converter according to claim 7 , wherein the capacitance group comprises:
a first capacitance; a second capacitance connected in parallel with the first capacitance through the switch group in the first state, isol

Assignees

• Renesas Electronics Corp

Inventors

• Okuda Yuichi
• Nakane Hideo
• Yamamoto Takaya
• Kimura Keisuke
• Oshima Takashi
• Matsuura Tatsuji

Classifications

• H03F3/005

  using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers (H03F3/45 takes precedence) · CPC title

• H03M1/1009 Primary

  Calibration · CPC title

• H03F2203/45544

  the IC comprising one or more capacitors, e.g. coupling capacitors · CPC title

• H03M1/002

  Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed · CPC title

• H03F1/02

  Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation · CPC title