Inrush Current Limiter

Patent metadata

Field	Value
Publication number	US-2016172844-A1
Application number	US-201414572274-A
Country	US
Kind code	A1
Filing date	Dec 16, 2014
Priority date	Dec 16, 2014
Publication date	Jun 16, 2016
Grant date	—

Abstract

An inrush current limiter for electronic fuses detects the type of load connected to the electronic fuse at ignition. By detecting the type of load, the limiter prevents a large peak current from flowing through the fuse. When a short circuit occurs, the limiter ensures that the electronic fuse only operates once in linear mode.

First claim

What is claimed is:

1 . An inrush current limiter comprising:
a current sensing device coupled to a main device that is configured to sense a scaled sense current from the main device; a current control device coupled to the current sensing device; a gate driver coupled to the main device and the current control device that is configured to drive a gate-to-source voltage of the main device; and a source voltage monitor coupled to the gate driver and the current control device, wherein the source voltage monitor is configured to monitor a source voltage of the main device.

2 . The inrush current limiter of claim 1 , wherein the current sensing device is a scaled down MOSFET version of a main MOSFET.

3 . The inrush current limiter of claim 2 , wherein the operational amplifier measures a voltage from the main device at a terminal that is compensated for resistive losses.

4 . The inrush current limiter of claim 1 , wherein the main device is a metal-oxide-semiconductor field-effect transistor (MOSFET) device.

5 . The inrush current limiter of claim 4 , wherein the MOSFET device comprises a main MOSFET and a sense MOSFET.

6 . The inrush current limiter of claim 5 , wherein the scaled sense current of the sense MOSFET is substantially 2000 times smaller than a current of the main MOSFET.

7 . The inrush current limiter of claim 1 , wherein the source voltage monitor further comprises:
a level shifting device; an analog to digital converter (ADC); and a voltage comparator.

8 . The inrush current limiter of claim 7 , wherein the ADC comprises a successive approximation register (SAR).

9 . The inrush current limiter of claim 8 , wherein the SAR is a 12-bit SAR.

10 . An inrush current limiter comprising:
a current control device coupled to a main device that compensates for resistive losses in the main device; a gate driver coupled to the main device and the current control device that is configured to drive a gate-to-source voltage of the main device; and a source voltage monitor coupled to the gate driver and the current control device, wherein the source voltage monitor is configured to monitor a source voltage of the main device.

11 . The inrush current limiter of claim 10 , wherein the main device is a metal-oxide-semiconductor field-effect transistor (MOSFET) device.

12 . The inrush current limiter of claim 11 , wherein the MOSFET device comprises a main MOSFET and a sense MOSFET.

13 . The inrush current limiter of claim 10 , wherein the source voltage monitor further comprises:
a level shifting device; an analog to digital converter (ADC); and a voltage comparator.

14 . The inrush current limiter of claim 13 , wherein the ADC comprises a successive approximation register (SAR).

15 . The inrush current limiter of claim 14 , wherein the SAR is a 12-bit SAR.

16 . A method of limiting an inrush current in a main device, the method comprising:
sensing a scaled sense current from the main device; controlling a current in the main device based upon the scaled sense current; driving a gate-to-source voltage of the main device with the controlled current; and monitoring an output voltage of the main device to identify a type of load coupled to the main device.

17 . The method of claim 16 , further comprising:
determining that the load coupled to the main device is a capacitive load when the output voltage displays a linear increase.

18 . The method of claim 17 , further comprising:
charging a gate of the main device when the load is determined to be the capacitive load.

19 . The method of claim 16 , further comprising:
determining that the load coupled to the main device is a low ohmic load when the output voltage does not exceed a threshold level.

20 . The method of claim 19 , further comprising:
disabling the main device when the load is determined to be a low ohmic load.

Assignees

• Nxp Bv

Inventors

• Van Dijk Luc

Classifications

• H02H9/025 Primary

  Current limitation using field effect transistors · CPC title

• H02H9/04

  responsive to excess voltage (lightning arrestors H01C7/12, H01C8/04, H01G9/18, H01T) · CPC title

• H02H9/001

  limiting speed of change of electric quantities, e.g. soft switching on or off (progressive control of electronic switches for eliminating interferences H03K17/16) · CPC title

• H02H1/0007

  concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445) · CPC title

• G01R19/0092

  Measuring current only · CPC title