Semiconductor device and semiconductor package
US-2016254357-A1 · Sep 1, 2016 · US
US2016172437A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016172437-A1 |
| Application number | US-201414908474-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 13, 2014 |
| Priority date | Aug 1, 2013 |
| Publication date | Jun 16, 2016 |
| Grant date | — |
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A semiconductor substrate (epitaxial substrate) having a main surface (upper surface) and made of a wide band gap semiconductor is provided, the semiconductor substrate including a device region formed in the semiconductor substrate, and a peripheral region formed to surround the device region. In the peripheral region, the semiconductor substrate includes a first semiconductor region (drift layer) having a first conductivity type, and a second semiconductor region (electric field relaxing region) formed on the first semiconductor region (drift layer) and having the main surface, the second semiconductor region having a second conductivity type different from the first conductivity type, and a plurality of trenches annularly surrounding the device region are formed in the main surface of the second semiconductor region (electric field relaxing region). Consequently, a wide band gap semiconductor device capable of achieving a higher breakdown voltage is provided without an increase in size.
Opening claim text (preview).
1 . A wide band gap semiconductor device, comprising a semiconductor substrate having a main surface and made of a wide band gap semiconductor, the semiconductor substrate including a device region formed in the semiconductor substrate, and a peripheral region formed to surround the device region, in the peripheral region, the semiconductor substrate including a first semiconductor region having a first conductivity type, and a second semiconductor region formed on the first semiconductor region and having the main surface, the second semiconductor region having a second conductivity type different from the first conductivity type, a plurality of peripheral region trenches annularly surrounding the device region being formed in the main surface of the second semiconductor region. 2 . The wide band gap semiconductor device according to claim 1 , wherein a bottom of each of the peripheral region trenches is located at the second semiconductor region side with respect to an interface between the first semiconductor region and the second semiconductor region. 3 . The wide band gap semiconductor device according to claim 1 , wherein a bottom of each of the peripheral region trenches is located at the first semiconductor region side with respect to an interface between the first semiconductor region and the second semiconductor region. 4 . The wide band gap semiconductor device according to claim 1 , wherein a dielectric layer covering the peripheral region trenches is formed on the main surface of the second semiconductor region. 5 . The wide band gap semiconductor device according to claim 4 , wherein a material forming the dielectric layer includes at least one selected from the group consisting of silicon dioxide, polyimide, and silicon nitride. 6 . The wide band gap semiconductor device according to claim 1 , wherein in the device region, a device trench is provided in the main surface of the semiconductor substrate, a width of each of the peripheral region trenches at the main surface in a direction perpendicular to a direction in which the peripheral region trench extends is smaller than a width of the device trench at the main surface in a direction perpendicular to a direction in which the device trench extends, and a depth of each of the peripheral region trenches in a direction perpendicular to the main surface is smaller than a depth of the device trench in the direction perpendicular to the main surface. 7 . The wide band gap semiconductor device according to claim 1 , wherein in the device region, the semiconductor substrate includes the first semiconductor region having the main surface, a pair of third semiconductor regions spaced apart from and facing each other at the main surface, the third semiconductor regions having the second conductivity type, and a fourth semiconductor region having the first conductivity type in each of the pair of third semiconductor regions, a width of each of the peripheral region trenches at the main surface in a direction perpendicular to a direction in which the peripheral region trench extends is smaller than spacing between the third semiconductor regions facing each other with the first semiconductor region interposed therebetween at the main surface, and a depth of each of the peripheral region trenches in a direction perpendicular to the main surface is smaller than a depth of a bottom of each of the third semiconductor regions from the main surface. 8 . The wide band gap semiconductor device according to claim 1 , wherein a sidewall of each of the peripheral region trenches is inclined with respect to the main surface. 9 . The wide band gap semiconductor device according to claim 1 , wherein the first conductivity type is n type, and the second conductivity type is p type.
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