Methods and apparatus for scrambling symbols over multi-lane serial interfaces

Patent metadata

Field	Value
Publication number	US-2016164705-A1
Application number	US-201514961501-A
Country	US
Kind code	A1
Filing date	Dec 7, 2015
Priority date	Mar 15, 2013
Publication date	Jun 9, 2016
Grant date	—

Abstract

Methods and apparatus for scrambling symbols over multi-lane serial interfaces in order to improve undesired electromagnetic emissions. In one embodiment the scrambling is based on a seed value associated with each lane. In a second embodiment, the scrambling values are selected from various taps of a scrambling component, where the selection is based on the associated lane. In still a third embodiment, each lane is associated with a distinct scrambling component.

First claim

1 .- 2 . (canceled)

3 . An apparatus configured to scramble a plurality of symbols, comprising:
a first interface that comprises a plurality of lanes, where in a legacy mode each lane is characterized by a common encoding mechanism configured to encode one or more symbols based on a running disparity, and in a non-legacy mode each lane is configured to scramble the encoded one or more symbols based on a corresponding distinct linear feedback shift register (LFSR) mechanism; a processor in data communication with the first interface and configured to:
when in the non-legacy mode:
transmit a plurality of symbols via the plurality of lanes, where the plurality of symbols are scrambled according to the corresponding distinct LFSR mechanism associated with each lane;
wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and

when in the legacy mode:
transmit another plurality of symbols compatible with legacy systems via the plurality of lanes, where the another plurality of symbols are encoded according to the common encoding mechanism;
wherein the another plurality of symbols are configured to be decoded by the receiver based on the running disparity, responsive to reception of the another plurality of symbols.

4 . The apparatus of claim 3 , wherein each corresponding distinct LFSR mechanism is based on a seed that corresponds to each lane, and the common encoding mechanism comprises an 8B10B line code.

5 . The apparatus of claim 4 , wherein each seed that corresponds to each of the corresponding distinct LFSR mechanisms results in a different initial value.

6 . The apparatus of claim 4 , wherein the plurality of symbols are scrambled with different bits of its corresponding distinct LFSR mechanism, based on a given lane of the plurality of lanes.

7 . The apparatus of claim 5 , wherein each corresponding distinct LFSR mechanism comprises a self-synchronizing LFSR.

8 . The apparatus of claim 7 , wherein the self-synchronizing LFSR is configured to reset when a pre-agreed scrambler reset seed is sent or received.

9 . The apparatus of claim 4 , wherein the corresponding distinct LFSR mechanisms comprise 16-bit LFSRs; and
a subset of bits of each of the corresponding distinct LFSR mechanisms is used for symbol encoding with the common encoding mechanism.

10 . The apparatus of claim 3 , wherein the processor in data communication with the first interface is further configured to negotiate whether to operate according to a non-legacy mode or a legacy mode with the receiver.

11 . The apparatus of claim 10 , wherein the negotiation defaults to the legacy mode.

12 . A method for scrambling a plurality of symbols, comprising:
determining whether to operate in a non-legacy mode or a legacy mode; when operating in the non-legacy mode:
scrambling a plurality of symbols via each lane of a plurality of lanes, each lane operating according to a corresponding distinct linear feedback shift register (LFSR) mechanism; and
transmitting the plurality of symbols via the plurality of lanes;
wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and
when operating in the legacy mode:
encoding another plurality of symbols via the plurality of lanes according to a common encoding scheme based on a running disparity;
transmitting the another plurality of symbols via the plurality of lanes;
wherein the another plurality of symbols are configured to be decoded by the receiver based on the running disparity, responsive to reception of the another plurality of symbols.

13 . The method of claim 12 , wherein the act of scrambling is based on a seed associated with each lane, and the act of encoding comprises an 8B10B line code.

14 . The method of claim 13 , further comprising initializing each corresponding distinct LFSR with a different initial value based on the seed that corresponds to each lane.

15 . The method of claim 14 , wherein the act of initializing is performed responsive to sending or receiving a pre-agreed scrambler reset seed.

16 . The method of claim 13 , wherein the act of scrambling the plurality of symbols is based on different bits of the LFSR mechanism, based on the each lane.

17 . A method for scrambling a plurality of symbols, comprising:
determining whether to operate in a non-legacy mode or default to operation in a legacy mode; when operating in the non-legacy mode:
scrambling a plurality of symbols via each lane of a plurality of lanes according to an uncorrelated scrambling mechanism; and
transmitting the plurality of symbols via the plurality of lanes;
wherein the plurality of symbols are configured to be descrambled by a receiver, responsive to reception of the plurality of symbols; and
otherwise, when operating in a legacy mode:
scrambling another plurality of symbols via a correlated scrambling mechanism.

18 . The method of claim 17 , wherein the act of uncorrelated scrambling comprises scrambling each lane of the plurality of lanes with a different seed; and
the act of correlated scrambling comprises scrambling each lane of the plurality of lanes with a common seed.

19 . The method of claim 17 , further comprising encoding the plurality of symbols according to an 8B10B line coding scheme or encoding the another plurality of symbols according to the 8B10B line coding scheme.

20 . The method of claim 17 , wherein the act of operating in the non-legacy mode further comprises initializing at least one self-synchronizing linear feedback shift register (LFSR).

21 . The method of claim 17 , wherein the act of determining whether to operate in a non-legacy mode comprises executing a non-scrambled transaction.

22 . The method of claim 17 , wherein the act of determining whether to operate in a non-legacy mode comprises executing an out-of-band transaction.

Assignees

• Apple Inc

Inventors

• Whitby-Strevens Colin

Classifications

• H04L25/03872

  Parallel scrambling or descrambling · CPC title

• H04L25/03866 Primary

  using scrambling · CPC title

• G09G2370/12

  Use of DVI or HDMI protocol in interfaces along the display data pipeline · CPC title

• G09G2330/06

  Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation · CPC title

• G06F3/14

  Digital output to display device {; Cooperation and interconnection of the display device with other functional units} · CPC title