Semiconductor structure with bottom-free liner for top contact

Patent metadata

Field	Value
Publication number	US-2016163645-A1
Application number	US-201414563284-A
Country	US
Kind code	A1
Filing date	Dec 8, 2014
Priority date	Dec 8, 2014
Publication date	Jun 9, 2016
Grant date	—

Abstract

A semiconductor structure includes a lined bottom contact filled with conductive material. The structure further includes a layer of dielectric material surrounding sides of the lined bottom contact, a top contact on the bottom contact, the top contact having a partial liner only along sides thereof with an absence of the liner at a bottom thereof and being filled with the conductive material, and a layer of the dielectric material surrounding sides of the partially lined top contact. Fabrication of the bottom-liner free top contact includes providing a starting structure, the structure including a lined bottom contact filled with conductive material, being surrounded by a layer of dielectric material and having a planarized top surface. The method further includes creating a top layer of dielectric material above the planarized top surface, creating a layer of liner material above the top dielectric layer, creating a top contact opening to the bottom contact, lining the top contact opening with a liner material, removing the liner at a bottom of the top contact opening, exposing the bottom contact, while preserving a portion of the liner on the top dielectric layer sufficient to allow adhesion of a subsequent conductive material, and filling the contact opening with the conductive material.

First claim

1 . A method, comprising:
providing a starting structure, the structure comprising a lined bottom contact filled with conductive material, being surrounded by a layer of dielectric material and having a planarized top surface; creating a top layer of dielectric material above the planarized top surface; creating a layer of liner material above the top dielectric layer; creating a top contact opening to the bottom contact; lining the top contact opening with a liner material; removing the liner at a bottom of the top contact opening, exposing the bottom contact, while preserving a portion of the liner on the top dielectric layer sufficient to allow adhesion of a subsequent conductive material; and filling the contact opening with the conductive material.

2 . The method of claim 1 , wherein the layer of liner material above the top dielectric layer has a thickness of about 10 nm to about 30 nm to satisfy the preserving.

3 . The method of claim 1 , wherein the filling creates excess conductive material above the layer of liner material, the method further comprising planarizing the excess conductive material and the layer of liner material.

4 . The method of claim 1 , further comprising:
creating a layer of sacrificial material over the layer of liner material prior to creating the top contact opening, the layer of sacrificial material satisfying the preserving; and removing the sacrificial layer prior to filling the contact opening.

5 . The method of claim 4 , wherein removing the sacrificial layer is accomplished by removing the bottom liner.

6 . The method of claim 4 , wherein removing the sacrificial layer comprises using a wet etch selective to the sacrificial layer.

7 . The method of claim 1 , further comprising creating a layer of conductive material over the layer of liner material prior to creating the top contact opening, the layer of conductive material satisfying the preserving.

8 . The method of claim 7 , further comprising leaving a remainder of the conductive layer intact prior to the filling.

9 . The method of claim 8 , wherein the conductive material of the bottom contact and the layer of conductive material comprise a same conductive material.

10 . A semiconductor structure, comprising:
at least one lined bottom contact filled with conductive material; a layer of dielectric material surrounding sides of the lined bottom contact; a top contact on the bottom contact, the top contact having a partial liner only along sides thereof with an absence of the liner at a bottom thereof and being filled with the conductive material; and a layer of the dielectric material surrounding sides of the partially lined top contact.

11 . The semiconductor structure of claim 10 , wherein the conductive material comprises tungsten, wherein the liner material comprises a metal, and wherein the dielectric material comprises an oxide inter-layer dielectric.

12 . The semiconductor structure of claim 11 , wherein the liner comprises titanium nitride.

13 . The semiconductor structure of claim 10 , further comprising at least one raised semiconductor structure coupled to the semiconductor substrate, the at least one lined bottom contact being situated in the at least one raised structure.

14 . The semiconductor structure of claim 10 , wherein the semiconductor structure is part of at least one of a source, a drain and a local interconnect.

15 . A semiconductor structure, comprising:
at least one lined bottom contact filled with a conductive material and surrounded by a layer of dielectric material; another layer of dielectric material over the at least one region and the layer of dielectric material; a layer of contact liner material over the another layer of dielectric material; and a preserving layer above the layer of contact liner material, the preserving layer preserving the layer of contact liner material in subsequent processing.

16 . The semiconductor structure of claim 15 , wherein the structure is silicon-based, and wherein the preserving layer comprises a sacrificial layer of a silicon-based material.

17 . The semiconductor structure of claim 16 , wherein the sacrificial layer comprises one of amorphous silicon, silicon nitride and silicon dioxide.

18 . The semiconductor structure of claim 15 , wherein the preserving layer comprises a layer of conductive material.

19 . The semiconductor structure of claim 18 , wherein the preserving layer comprises tungsten.

20 . The semiconductor structure of claim 15 , wherein the semiconductor structure is situated in a raised semiconductor structure coupled to a semiconductor substrate.

Assignees

• Globalfoundries Inc

Inventors

• Kamineni Vimal K
• Xie Ruilong

Classifications

• H10W20/4403

  based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/42 Primary

  Vias, e.g. via plugs · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title