Wiring substrate, method of manufacturing the same and electronic component device

US2016157345A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016157345-A1
Application numberUS-201514950762-A
CountryUS
Kind codeA1
Filing dateNov 24, 2015
Priority dateNov 27, 2014
Publication dateJun 2, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on the electrode pad, and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively.

First claim

Opening claim text (preview).

What is claimed is: 1 . A wiring substrate comprising: an electronic component mounting pad; an electrode pad arranged at an outer side of the electronic component mounting pad; a first insulation layer formed on the electronic component mounting pad and the electrode pad; an opening formed in the first insulation layer on the electronic component mounting pad; a connection hole formed in the first insulation layer on the electrode pad; and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively. 2 . A wiring substrate comprising: an electrode pad; a first insulation layer formed on the electrode pad; a connection hole formed in the first insulation layer on the electrode pad; and a recess portion formed at the electrode pad in the connection hole. 3 . The wiring substrate according to claim 1 , further comprising: a second insulation layer formed below the electronic component mounting pad and the electrode pad; and an opening formed in the second insulation layer below the electrode pad, wherein a recess portion is formed at the electrode pad in the opening of the second insulation layer. 4 . The wiring substrate according to claim 1 , wherein the electronic component mounting pad and the electrode pad are formed of a metal foil. 5 . The wiring substrate according to claim 1 , wherein the first insulation layer is a resin film. 6 . The wiring substrate according to claim 2 , wherein the first insulation layer is a resin film. 7 . The wiring substrate according to claim 1 , wherein a metal-plated layer is formed on the electrode pad in the connection hole. 8 . The wiring substrate according to claim 2 , wherein a metal-plated layer is formed on the electrode pad in the connection hole. 9 . The wiring substrate according to claim 3 , wherein the recess portion formed at the electrode pad in the connection hole of the first insulation layer and the recess portion formed at the electrode pad in the opening of the second insulation layer are arranged to deviate from each other so that they are positioned in areas, which do not overlap with each other. 10 . An electronic component device comprising: a wiring substrate according to claim 1 ; an electronic component mounted on the electronic component mounting pad; and a metallic wire connecting the electronic component and the electrode pad each other. 11 . An electronic component device comprising: a wiring substrate according to claim 2 ; and an electronic component flip-chip connected to the recess portion of the electrode pad in the connection hole.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • by a substrate and the encapsulations · CPC title

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Frequently asked questions

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What does patent US2016157345A1 cover?
A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on th…
Who is the assignee on this patent?
Shinko Electric Ind Co
What technology area does this patent fall under?
Primary CPC classification H10W70/411. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).