Semiconductor device having tungsten gate electrode and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-2016155673-A1
Application number	US-201615009493-A
Country	US
Kind code	A1
Filing date	Jan 28, 2016
Priority date	Aug 31, 2012
Publication date	Jun 2, 2016
Grant date	—

Abstract

The present invention provides a semiconductor device in which the threshold voltage of NMOS and the threshold voltage of PMOS are independently controllable, and a method for fabricating the same. The method includes: forming a gate insulating film over an NMOS region and a PMOS region of a semiconductor substrate; forming a carbon-containing tungsten over the gate insulating film formed over one of the NMOS region and the PMOS region; forming a carbon-containing tungsten nitride over the gate insulating film formed over the other one of the PMOS region or the NMOS region; forming a tungsten film over the carbon-containing tungsten and the carbon-containing tungsten nitride; post-annealing the carbon-containing tungsten and the carbon-containing tungsten nitride; and etching the tungsten film, the carbon-containing tungsten, and the carbon-containing tungsten nitride, to form a gate electrode in the NMOS region and the PMOS region

First claim

1 - 15 . (canceled)

16 . A method for fabricating a semiconductor device, the method comprising:
forming a gate insulating film over an entire surface of a semiconductor substrate including an NMOS region and a PMOS region; forming a first tungsten-containing film, containing a first work function control material, over the gate insulating film formed over the NMOS region; forming a second tungsten-containing film, containing a second work function control material, over the gate insulating film formed over the PMOS region; post-annealing the semiconductor substrate having the first tungsten-containing film and the second tungsten-containing film formed thereon; and etching the first tungsten-containing film and the second tungsten-containing film to form a gate electrode in the NMOS region and the PMOS region.

17 . The method of claim 16 , wherein the first work function control material includes carbon.

18 . The method of claim 16 , wherein the second work function control material includes carbon and nitrogen.

19 . The method of claim 16 , wherein forming the first tungsten-containing film and the second tungsten-containing film comprises:
performing an atomic layer deposition using a fluorine-free tungsten source containing carbon.

20 . The method of claim 19 , wherein the first tungsten-containing film includes a fluorine-free tungsten containing carbon, and wherein forming the first tungsten-containing film further comprises:
plasma treating the first tungsten-containing film with a hydrogen-containing material to control a carbon content of the first tungsten-containing film.

21 . The method of claim 19 , wherein the second tungsten-containing film includes a fluorine-free tungsten nitride containing carbon, and wherein forming the second tungsten-containing film further comprises:
plasma treating the second tungsten-containing film with a nitrogen-containing material to control a carbon content and a nitrogen content of the second tungsten-containing film.

22 . The method of claim 16 , further comprising:
forming a third tungsten-containing film over the first tungsten-containing film and the second tungsten-containing film.

23 . The method of claim 22 , wherein forming the third tungsten-containing film comprises:
forming a tungsten nucleation film over the first tungsten-containing film and the second tungsten-containing film; and forming a bulk tungsten film over the tungsten nucleation film.

24 . A method for fabricating a semiconductor device, the method comprising:
forming a gate insulating film over an NMOS region and a PMOS region of a semiconductor substrate; forming a carbon-containing tungsten over the gate insulating film formed over the NMOS region; forming a carbon-containing tungsten nitride over the gate insulating film formed over the PMOS region; forming a tungsten film over the carbon-containing tungsten and the carbon-containing tungsten nitride; post-annealing the carbon-containing tungsten and the carbon-containing tungsten nitride; and etching the tungsten film, the carbon-containing tungsten, and the carbon-containing tungsten nitride, to form a gate electrode in the NMOS region and the PMOS region.

25 . The method of claim 24 , wherein a carbon content of the carbon-containing tungsten is controlled such that the carbon content of the first gate electrode is about 10-15 at %.

26 . The method of claim 24 , further comprising:
controlling a carbon content and a nitrogen content of the carbon-containing tungsten nitride so that the carbon content and the nitrogen content of the second gate electrode are about 5-10 at % and about 20-30 at %, respectively.

Assignees

• Sk Hynix Inc

Inventors

• Kang Dong-Kyun

Classifications

• H10D64/01318

  the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314) · CPC title

• H10D84/0181

  Manufacturing their gate insulating layers · CPC title

• H10D84/85

  Complementary IGFETs, e.g. CMOS · CPC title

• H10D64/667

  the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671) · CPC title

• H10D64/035

  comprising conductor-insulator-conductor-insulator-semiconductor structures · CPC title