Display device and driving method thereof

US2016155405A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016155405-A1
Application numberUS-201514855133-A
CountryUS
Kind codeA1
Filing dateSep 15, 2015
Priority dateDec 1, 2014
Publication dateJun 2, 2016
Grant date

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A display device includes gate lines, data lines, pixels connected to the gate lines and data lines, a data driver, a gate driver, and a signal controller for controlling the data driver and gate driver. A method for driving the display device includes: compressing, by the signal controller, vertical resolution of input image data of each frame by k or receiving by the signal controller the compressed input image data; processing by the signal controller the compressed input image data to generate output image data; generating, by the data driver, data voltages based on the output image data and applying the data voltages to the data lines; and applying, by the gate driver, gate-on voltage pulses concurrently to k neighboring gate lines corresponding to the applied data voltages. Starting times of the gate-on voltage pulses of at least two of the k neighboring gate lines are different from each other.

First claim

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What is claimed is: 1 . A method for driving a display device comprising a plurality of gate lines, a plurality of data lines, a plurality of pixels each including at least one switching element connected to at least one of the gate lines and at least one of the data lines, a data driver, a gate driver, and a signal controller for controlling the data driver and the gate driver, the method comprising: compressing, by the signal controller, vertical resolution of input image data of each of a plurality of frames including a first frame by k (k is a natural number greater than one) or receiving by the signal controller the compressed input image data; processing by the signal controller the compressed input image data to generate output image data; generating, by the data driver, data voltages based on the output image data and applying the data voltages to the data lines; and applying, by the gate driver, gate-on voltage pulses concurrently to k neighboring ones of the gate lines corresponding to the applied data voltages, wherein, in the first frame, starting times of the gate-on voltage pulses of at least two gate lines from among the k neighboring ones of the gate lines are different from each other. 2 . The method of claim 1 , wherein the output image data comprise first output image data and second output image data, the data voltages comprise first data voltages and second data voltages corresponding to the first output image data and the second output image data, respectively, the first data voltages and the second data voltages being consecutively applied to the data lines, the k neighboring ones of the gate lines comprise a first k neighboring ones of the gate lines and a second k neighboring ones of the gate lines, the first k neighboring ones of the gate lines corresponding to the applied first data voltages and the second k neighboring ones of the gate lines corresponding to the applied second data voltages, the first k neighboring ones of the gate lines comprise a first gate line and a second gate line, the second k neighboring ones of the gate lines comprise a third gate line and a fourth gate line, and the gate-on voltage pulses comprise first, second, third, and fourth gate-on voltage pulses for respectively applying to the first, second, third, and fourth gate lines, the starting time for the second gate-on voltage pulse being between those of the first gate-on voltage pulse and the third gate-on voltage pulse. 3 . The method of claim 2 , wherein the first gate-on voltage pulse is applied in synchronization with the applied first data voltages, and the third gate-on voltage pulse is applied in synchronization with the applied second data voltages. 4 . The method of claim 3 , wherein the output image data comprise odd-row compressed data or odd-row interpolated and compressed data, the odd-row compressed data are generated by extracting the input image data corresponding to an odd row of the pixels, and the odd-row interpolated and compressed data are generated by interpolating the input image data corresponding to an even row of the pixels preceding the odd row and the input image data corresponding to an even row of the pixels following the odd row. 5 . The method of claim 3 , wherein in a second frame of the plurality of frames alternating with the first frame with a vertical blank section therebetween, a section of the first gate-on voltage pulse overlaps the vertical blank section. 6 . The method of claim 5 , wherein in the first frame, the output image data comprise odd-row compressed data or odd-row interpolated and compressed data, in the second frame, the output image data comprise even-row compressed data or even-row interpolated and compressed data, the odd-row compressed data are generated by extracting the input image data corresponding to odd rows of the pixels, the odd-row interpolated and compressed data are generated by interpolating the input image data corresponding to respective even rows of the pixels preceding the odd rows and the input image data corresponding to respective even rows of the pixels following the odd rows, the even-row compressed data are generated by extracting the input image data corresponding to even rows of the pixels, and the even-row interpolated and compressed data are generated by interpolating the input image data corresponding to respective odd rows of the pixels preceding the even rows and the input image data corresponding to respective odd rows of the pixels following the even rows. 7 . The method of claim 3 , wherein lengths of an overlapping section of the first gate-on voltage pulse and the second gate-on voltage pulse are different from each other in two neighboring frames of the plurality of frames. 8 . The method of claim 7 , wherein the output image data comprise odd-row compressed data or odd-row interpolated and compressed data, the odd-row compressed data are generated by extracting the input image data corresponding to an odd row of the pixels, and the odd-row interpolated and compressed data are generated by interpolating the input image data corresponding to an even row of the pixels preceding the odd row and the input image data corresponding to an even row of the pixels following the odd row. 9 . The method of claim 1 , wherein the input image data in the first frame comprise image data for a first viewpoint, and the input image data in a second frame following the first frame from among the plurality of frames comprise image data for a second viewpoint different from the first viewpoint. 10 . The method of claim 1 , wherein the input image data in the first frame and the input image data in a second frame following the first frame from among the plurality of frames comprise image data for the same viewpoint. 11 . A method for driving a display device comprising a plurality of gate lines, a plurality of data lines, a plurality of pixels each including at least one switching element connected to at least one of the gate lines and at least one of the data lines, a data driver, a gate driver, and a signal controller for controlling the data driver and the gate driver, the method comprising: compressing, by the signal controller, vertical resolution of input image data of each of a plurality of frames including a first frame by k (k is a natural number greater than one) or receiving by the signal controller the compressed input image data; processing by the signal controller the compressed input image data to generate output image data; generating, by the data driver, data voltages based on the output image data and applying the data voltages to the data lines; applying, by the gate driver in the first frame, gate-on voltage pulses concurrently to k neighboring ones of the gate lines corresponding to the applied data voltages; and applying, by the gate driver in neighboring frames of the first frame from among the plurality of frames, the gate-on voltage pulses to the k neighboring ones of the gate lines, wherein the gate-on voltage pulses of the k neighboring ones of the gate lines are not applied concurrently in the neighboring frames of the first frame. 12 . The method of claim 11 , wherein the output image data comprise first output image data and second output image data, the data voltages comprise first data voltages and second data voltages corresponding to the first output image data and the second output image data, respectively, the first data voltages and the second data voltages being consecutively applied to the data lines, the k neighboring ones of the gate lines comprise a first k neighboring ones of the gate lines and a

Assignees

Inventors

Classifications

  • Change or adaptation of the frame rate of the video stream · CPC title

  • G09G3/20Primary

    for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

  • to produce spatial visual effects · CPC title

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What does patent US2016155405A1 cover?
A display device includes gate lines, data lines, pixels connected to the gate lines and data lines, a data driver, a gate driver, and a signal controller for controlling the data driver and gate driver. A method for driving the display device includes: compressing, by the signal controller, vertical resolution of input image data of each frame by k or receiving by the signal controller the com…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jun 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).