Integration of downstream ports in a multiple interface device

Patent metadata

Field	Value
Publication number	US-2016154759-A1
Application number	US-201414557148-A
Country	US
Kind code	A1
Filing date	Dec 1, 2014
Priority date	Dec 1, 2014
Publication date	Jun 2, 2016
Grant date	—

Abstract

One aspect of a multiple data type interface device can include a plurality of upstream ports, wherein at least two of the upstream ports are of a different type, a plurality of downstream ports, wherein at least one of the plurality of downstream ports is configured to connect to an external device, and one or more processors configured to detect a connection at one of the plurality of upstream ports, and route an upstream port signal associated with one of the plurality of upstream ports to the at least one of the plurality of downstream ports configured to connect to the external device when the connection is detected at the one of the plurality of upstream.

First claim

What is claimed is:

1 . A multiple data type interface device, comprising:
a plurality of upstream ports, wherein at least two of the upstream ports are of a different type; a plurality of downstream ports, wherein at least one of the plurality of downstream ports is configured to connect to an external device; and one or more processors configured to:
detect a connection at one of the plurality of upstream ports; and
route an upstream port signal associated with one of the plurality of upstream ports to the at least one of the plurality of downstream ports configured to connect to the external device when the connection is detected at the one of the plurality of upstream ports.

2 . The device of claim 1 , wherein the one or more processors are further configured to convert the routed upstream port signal from a first signal standard to a second signal standard.

3 . The device of claim 2 , wherein the first signal standard comprises a peripheral component interconnect express (PCIe) standard and the second signal standard comprises a universal serial bus (USB) standard.

4 . The device of claim 3 , wherein the one or more processors are further configured to route a downstream port signal associated with one of the downstream ports to the one of the plurality of upstream ports.

5 . The device of claim 4 , wherein the one or more processors are further configured to convert the routed downstream port signal from the USB standard to the PCIe standard.

6 . The device of claim 4 , wherein the one or more processors are further configured to route the upstream port signal and the downstream port signal through one of a universal serial bus (USB) B-type interface or a USB extensible host controller interface (xHCI).

7 . The device of claim 6 , wherein the one or more processors are further configured to route the upstream port signal through the USB B-type interface when the one of the plurality of upstream ports comprises a USB type-B compatible port.

8 . The device of claim 7 , wherein the one or more processors are further configured to route the upstream signal through the xHCI when the one of the plurality of upstream ports comprises a PCIe compatible port.

9 . The device of claim 8 , wherein the plurality of downstream ports comprise a plurality of USB type-A compatible ports.

10 . The device of claim 3 , further comprising at least one internal storage device, wherein the one or more processors are further configured to:
route a second upstream port signal associated with one of the plurality of upstream ports to the at least one internal storage device; and convert the routed second upstream port signal from the PCIe standard to a third signal standard.

11 . The device of claim 10 , wherein the third signal standard comprises an external serial advanced technology attachment (eSATA) standard.

12 . The device of claim 1 , wherein the multiple interface device comprises an external hard drive.

13 . A method for switching between interfaces of a multiple data type interface device, the method comprising:
detecting a connection at one of a plurality of upstream ports, wherein at least two of the plurality of upstream ports are of a different type; and routing an upstream port signal associated with the one of the plurality of upstream ports to at least one of a plurality of downstream ports connected to an external device.

14 . The method of claim 13 , further comprising converting the routed upstream port signal from a first signal standard to a second signal standard.

15 . The method of claim 14 , wherein the first signal standard comprises a peripheral component interconnect express (PCIe) standard and the second signal standard comprises a universal serial bus (USB) standard.

16 . The method of claim 15 , further comprising routing a downstream port signal associated with one of the downstream ports to the one of the plurality of upstream ports.

17 . The method of claim 16 , further comprising converting the routed downstream port signal from the USB standard to the PCIe standard.

18 . The method of claim 16 , further comprising routing the upstream port signal and the downstream port signal through one of a universal serial bus (USB) B-type interface or a USB extensible host controller interface (xHCI).

19 . The method of claim 18 , further comprising routing the upstream port signal through the USB B-type interface when the one of the plurality of upstream ports comprises a USB type-B compatible port.

20 . The method of claim 19 , further comprising routing the upstream port signal through the xHCI when the one of the plurality of upstream ports comprises a PCIe compatible port.

21 . The method of claim 20 , wherein the plurality of downstream ports comprise a plurality of USB type-A compatible ports.

22 . The method of claim 15 , further comprising:
routing a second upstream port signal associated with one of the plurality of upstream ports to at least one internal storage device; and converting the routed second upstream port signal from the PCIe signal standard to a third signal standard.

23 . The method of claim 22 , wherein the third signal standard comprises an external serial advanced technology attachment (eSATA) standard.

24 . The method of claim 13 , wherein the multiple interface device comprises an external hard drive.

Assignees

• Western Digital Tech Inc

Inventors

• Kakish Musa I

Classifications

• G06F13/4068 Primary

  Electrical coupling · CPC title

• G06F13/10 Primary

  Program control for peripheral devices (G06F13/14 - G06F13/42 take precedence) · CPC title