Switching methods for context migration and systems thereof

Patent metadata

Field	Value
Publication number	US-2016154649-A1
Application number	US-201514799899-A
Country	US
Kind code	A1
Filing date	Jul 15, 2015
Priority date	Dec 1, 2014
Publication date	Jun 2, 2016
Grant date	—

Abstract

A switching method for context migration among a plurality of physical processor cores is provided. Each of the physical processor cores is mapped to a corresponding logical processor core. The switching method includes migrating a processor hardware context from a first physical processor core to a second physical processor core which is different from the first physical processor core. The first physical processor core and the second physical processor core are mapped to a first logical processor core and a second logical processor core which is different from the first logical processor core, respectively prior to the migration. The switching method further includes remapping the first physical processor core to the second logical processor core and remapping the second physical processor core to the first logical processor core.

First claim

What is claimed is:

1 . A switching method for context migration among a plurality of physical processor cores, wherein each of the physical processor cores is mapped to a corresponding logical processor core, the method comprising:
migrating a processor hardware context from a first physical processor core to a second physical processor core which is different from the first physical processor core, wherein the first physical processor core and the second physical processor core are mapped to a first logical processor core and a second logical processor core which is different from the first logical processor core, respectively prior to the migration; and remapping the first physical processor core to the second logical processor core, and remapping the second physical processor core to the first logical processor core.

2 . The switching method as claimed in claim 1 , wherein the processor hardware context comprises an execution context, an event signal transceiver glue layer, and a debug context.

3 . The switching method as claimed in claim 2 , wherein each of the physical processor cores comprises respective one or more general registers, respective one or more control registers, respective one or more generic timers, and respective one or more floating point co-processor cores, and the step of migrating the execution context from the first physical processor core to the second physical processor core comprises further comprises moving contents of the one or more general registers, the one or more control registers, the one or more generic timers, and the one or more floating point co-processor cores of the first physical processor core to those of the second physical processor core.

4 . The switching method as claimed in claim 3 , further comprising modifying the contents of the one or more control registers of the first physical processor core to be suitable for execution of the second physical processor core prior to moving the contents of the one or more control registers of the first physical processor core to the one or more control registers of the second physical processor core.

5 . The switching method as claimed in claim 2 , wherein the event signal transceiver glue layer comprises an interface distributer, and each of the physical processor cores has a respective asynchronous event interface commonly coupled to the interface distributer of the event signal transceiver glue layer, and the step of migrating the event signal transceiver glue layer from the first physical processor core to a second physical processor core further comprises reconfiguring the interface distributer of the event signal transceiver glue layer.

6 . The switching method as claimed in claim 2 , wherein each of the physical processor cores has one or more respective debug registers commonly coupled to a debugger, and the step of migrating the debug context from the first physical processor core to the second physical processor core further comprises moving the contents of the one or more debug registers of the first physical processor core to the one or more debug registers of the second physical processor core.

7 . The switching method as claimed in claim 1 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core is performed directly or indirectly from the first physical processor core to the second physical processor core.

8 . The switching method as claimed in claim 2 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core further comprises:
saving contents of the execution context and the debug context of the first physical processor core from the first physical processor core to a memory; and reloading the saved contents of the execution context and the debug context of the first physical processor core from the memory to the second physical processor core.

9 . The switching method as claimed in claim 8 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core further comprises:
disjoining the first physical processor core from a symmetric multiprocessing environment of the plurality of physical processor cores between the step of saving contents of the execution context and the debug context of the first physical processor core and the step of reloading the saved contents of the execution context and the debug context of the first physical processor core; and joining the second physical processor core to the symmetric multiprocessing environment of the plurality of physical processor cores after the step of reloading the saved contents of the execution context and the debug context of the first physical processor core.

10 . The switching method as claimed in claim 9 , further comprising:
stopping an asynchronous event service before the step of saving contents of the execution context and the debug context of the first physical processor core; migrating the event signal transceiver glue layer from the first physical processor core to the second physical processor core between the step of reloading the saved contents of the execution context and the debug context of the first physical processor core and the step of joining the second physical processor core to the symmetric multiprocessing environment; and starting the asynchronous event service after the step of joining the second physical processor core to the symmetric multiprocessing environment.

11 . The switching method as claimed in claim 8 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core further comprises powering on the second physical processor core before the step of reloading the saved contents of the execution context and the debug context of the first physical processor core.

12 . The switching method as claimed in claim 2 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core further comprises directly loading contents of the execution context and the debug context of the first physical processor core from the first physical processor core to the second physical processor core without passing through any memory.

13 . The switching method as claimed in claim 12 , wherein the step of migrating the processor hardware context from the first physical processor core to the second physical processor core further comprises:
disjoining the first physical processor core from a symmetric multiprocessing environment of the plurality of physical processor cores before the step of loading contents of the execution context and the debug context of the first physical processor core; and joining the second physical processor core to the symmetric multiprocessing environment of the plurality of physical processor cores after the step of loading contents of the execution context and the debug context of the first physical processor core.

14 . The switching method as claimed in claim 13 , further comprising:
stopping an asynchronous event service before the step of loading contents of the execution context and the debug context of the first physical processor core; migrating the event signal transceiver glue layer from the first physical processor core to the second physical processor core between the step of loading the execution context and the debug context of the first physical processor core and the step of joining the second physical processor core to

Assignees

• Mediatek Inc

Inventors

• Lin Yu-Teng
• Huang Wan-Ching
• Lin Yu-Pin
• Tang Nicholas Ching Hui

Classifications

• G06F9/461 Primary

  Saving or restoring of program or task context · CPC title

• G06F9/30076 Primary

  to perform miscellaneous control operations, e.g. NOP · CPC title

• G06F9/30123

  according to context, e.g. thread buffers · CPC title

• G06F9/4875 Primary

  with migration policy, e.g. auction, contract negotiation · CPC title

• G06F9/4856

  resumption being on a different machine, e.g. task migration, virtual machine migration (G06F9/5088 takes precedence) · CPC title