Memory device with data scrubbing capability and methods
US-2024393961-A1 · Nov 28, 2024 · US
US2016154597A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016154597-A1 |
| Application number | US-201615012608-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 1, 2016 |
| Priority date | May 13, 2013 |
| Publication date | Jun 2, 2016 |
| Grant date | — |
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Approaches for automatically backing up data from volatile memory to persistent storage in the event of a power outage, blackout or other such failure are described. The approaches can be implemented on a computing device that includes a motherboard, central processing unit (CPU) a main power source, volatile memory (e.g., random access memory (RAM)), an alternate power source and circuitry (e.g., a specialized application-specific integrated circuit (ASIC)) for performing the backup of volatile memory to a persistent storage device. In the event of a power failure of the main power source, the alternate power source is configured to supply power to the specialized ASIC for backing up the data in the volatile memory. For example, when power failure is detected, the ASIC can read the data from the DIMM socket using power supplied from the alternate power source and write that data to a persistent storage device.
Opening claim text (preview).
What is claimed is: 1 . A computing device, comprising: a main power source; and a motherboard configured to receive power from the main power source, the motherboard comprising: an application-specific integrated circuit (ASIC) configured to enable protection of data in an event of a power failure; a first socket configured to connect to a dual in-line memory module (DIMM); a second socket configured to connect to a persistent storage device; an alternate power source capable of supplying power to the ASIC, the first socket, the DIMM, the second socket and the persistent storage device; and a central processing unit (CPU) connected to the first socket, the CPU configured to read and write data to the DIMM over the first socket by utilizing the power supplied from the main power source; the application-specific integrated circuit (ASIC) coupled to the first socket and to the second socket, wherein in the event of a power failure on the main power source, the ASIC is configured to: access the data stored on the DIMM over the first socket using the power supplied by the alternate power source; and write the data obtained over the first socket to the persistent storage device over the second socket by using the power supplied from the alternate power source.
in relation to data integrity, e.g. data losses, bit errors · CPC title
Redundant power supplies (power supply failure G06F1/30) · CPC title
Providing cryptographic facilities or services · CPC title
in semiconductor storage media, e.g. directly-addressable memories · CPC title
interconnection devices, e.g. bus-connected or in-line devices · CPC title
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