System and method for achieving high performance data flow among user space processes in storage systems

Patent metadata

Field	Value
Publication number	US-2016154584-A1
Application number	US-201615017288-A
Country	US
Kind code	A1
Filing date	Feb 5, 2016
Priority date	Jun 20, 2008
Publication date	Jun 2, 2016
Grant date	—

Abstract

Fault isolation capabilities made available by user space can be provided for a embedded network storage system without sacrificing efficiency. By giving user space processes direct access to specific devices (e.g., network interface cards and storage adapters), processes in a user space can initiate Input/Output requests without issuing system calls (and entering kernel mode). The multiple user spaces processes can initiate requests serviced by a user space device driver by sharing a read-only address space that maps the entire physical memory one-to-one. In addition, a user space process can initiate communication with another user space process by use of transmit and receive queues similar to transmit and receiver queues used by hardware devices. And, a mechanism of ensuring that virtual addresses that work in one address space reference the same physical page in another address space is used.

First claim

1 - 21 . (canceled)

22 . A method comprising:
creating, by a storage server, a reference to a virtual memory address in a plurality of physical memory blocks, wherein the virtual memory address is associated with at least one of a plurality of Excessive Symmetric Multi-Processing (XSMP) data processes; converting, by the storage server, the virtual memory address to a physical memory address; creating, by the storage server, a read-only memory address space based on higher order address bits in the physical memory address, wherein the read-only memory address space corresponds to at least a portion of the plurality of physical memory blocks; and sharing, by the storage server, the read-only memory address space with at least one of the plurality of XSMP data processes.

23 . The computer system of claim 22 , further comprising:
mapping, by the storage server, the read-only memory address space to the plurality of XSMP data processes, wherein the plurality of XSMP data processes are associated with at least one computing device.

24 . The method of claim 22 , further comprising:
receiving, by the storage server, a request for XSMP services; and tagging, by the storage server, a normal process associated with the request for XSMP services as one of the plurality of XSMP processes.

25 . The method of claim 22 , wherein each of the plurality of XSMP processes is associated with a separate threading model from an operating system or a separate scheduler from the operating system.

26 . The method of claim 22 , wherein the converting further comprises:
mapping, by the storage server, at least one Memory Management Unit (MMU) page table onto at least one of the plurality of XSMP processes, wherein the MMU is read-only and viewable through the read-only address memory space.

27 . The method of claim 22 , further comprising:
receiving, by the storage server, communications between an operating system and the plurality of XSMP processes, wherein the communications comprise a request to terminate at least one of the plurality of XSMP processes, a request to change processor resources, or a request to change memory resources; and creating, by the storage server, an XSMP data structure in the plurality of memory blocks, wherein the XSMP data structure is associated with the communications between the operating system and the plurality of XSMP processes.

28 . A non-transitory machine readable medium having stored thereon instructions for performing a method comprising machine executable code which when executed by at least one machine, causes the machine to:
create a reference to a virtual memory address in a plurality of physical memory blocks, wherein the virtual memory address is associated with at least one of a plurality of Excessive Symmetric Multi-Processing (XSMP) data processes; convert the virtual memory address to a physical memory address; create a read-only memory address space based on higher order address bits in the physical memory address, wherein the read-only memory address space corresponds to at least a portion of the plurality of physical memory blocks; and share the read-only memory address space with at least one of the plurality of XSMP data processes.

29 . The medium of claim 28 , further having stored thereon instructions which when executed by the at least one machine, causes the machine to:
map the read-only memory address space to the plurality of XSMP data processes, wherein the plurality of XSMP data processes are associated with at least one computing device.

30 . The medium of claim 28 , further having stored thereon instructions which when executed by the at least one machine, causes the machine to:
receive a request for XSMP services; and tag a normal process associated with the request for XSMP services as one of the plurality of XSMP processes.

31 . The medium of claim 28 , wherein each of the plurality of XSMP processes is associated with a separate threading model from an operating system or a separate scheduler from the operating system.

32 . The medium of claim 28 , wherein the converting further comprises:
mapping at least one Memory Management Unit (MMU) page table onto at least one of the plurality of XSMP processes, wherein the MMU is read-only and viewable through the read-only address memory space.

33 . The medium of claim 28 , further having stored thereon instructions which when executed by the at least one machine, causes the machine to:
receive communications between an operating system and the plurality of XSMP processes, wherein the communications comprise a request to terminate at least one of the plurality of XSMP processes, a request to change processor resources, or a request to change memory resources; and create an XSMP data structure in the plurality of memory blocks, wherein the XSMP data structure is associated with the communications between the operating system and the plurality of XSMP processes.

34 . A computing device comprising:
a memory containing a machine readable medium comprising machine executable code having stored thereon instructions for performing a method of achieving high performance data flow; a processor coupled to the memory, the processor configured to execute the machine executable code to cause the processor to:
create a reference to a virtual memory address in a plurality of physical memory blocks, wherein the virtual memory address is associated with at least one of a plurality of Excessive Symmetric Multi-Processing (XSMP) data processes;
convert the virtual memory address to a physical memory address;
create a read-only memory address space based on higher order address bits in the physical memory address, wherein the read-only memory address space corresponds to at least a portion of the plurality of physical memory blocks; and
share the read-only memory address space with at least one of the plurality of XSMP data processes.

35 . The device of claim 34 , wherein the processor is further configured to execute the machine executable code to cause the processor to:
map the read-only memory address space to the plurality of XSMP data processes, wherein the plurality of XSMP data processes are associated with at least one computing device.

36 . The device of claim 34 , wherein the processor is further configured to execute the machine executable code to cause the processor to:
receive a request for XSMP services; and tag a normal process associated with the request for XSMP services as one of the plurality of XSMP processes.

37 . The device of claim 34 , wherein each of the plurality of XSMP processes is associated with a separate threading model from an operating system or a separate scheduler from the operating system.

38 . The device of claim 34 , wherein the converting further comprises:
mapping at least one Memory Management Unit (MMU) page table onto at least one of the plurality of XSMP processes, wherein the MMU is read-only and viewable through the read-only address memory space.

39 . The device of claim 34 , wherein the processor is further configured to execute the machine executable code to cause the processor to:
receive communications between an operating system and the plurality of XSMP processes, wherein the communications comprise a request to terminate at least one of the plurality of XSMP processes, a request to change processor resources, or a request to change memory resources; and create an XSMP data structure in the plurality of memory blocks, wherein the XSMP data structure i

Assignees

• Netapp Inc

Inventors

• Thelen Randy
• Goodson Garth
• Srinivasan Kiran
• Susarla Sai

Classifications

• G06F9/544 Primary

  Buffers; Shared memory; Pipes · CPC title

• G06F9/545

  where tasks reside in different layers, e.g. user- and kernel-space · CPC title

• G06F3/0647

  Migration mechanisms · CPC title

• G06F12/023

  Free address space management · CPC title

• G06F3/0685

  Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays · CPC title