Array substrate, preparation method thereof, display panel and display apparatus
US-2024377685-A1 · Nov 14, 2024 · US
US2016154282A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016154282-A1 |
| Application number | US-201514878634-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 8, 2015 |
| Priority date | Nov 27, 2014 |
| Publication date | Jun 2, 2016 |
| Grant date | — |
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A liquid crystal display includes: a first substrate; a gate line disposed on the first substrate; an insulating layer disposed on the gate line; and first and second subpixel electrodes respectively including pixel branch electrodes, wherein the first and second subpixel electrodes respectively comprise first and second regions, the first and second regions of the first subpixel electrode have a polygonal shape where two sides meet in a diagonal line, and one of sides of the polygon, excluding the diagonal line, is perpendicular to the gate line, the first and second regions of the second subpixel electrode have grooves disposed at one of sides thereof corresponding to the shape of the first subpixel electrode, the first and second regions of the first subpixel electrode are connected with each other, and the first and second regions of the second subpixel electrode are connected with each other.
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What is claimed is: 1 . A liquid crystal display comprising: a first substrate; a gate line disposed on the first substrate; an insulating layer disposed on the gate line; and a first subpixel electrode and a second subpixel electrode including a plurality of pixel branch electrodes, wherein the first subpixel electrode and the second subpixel electrode respectively comprise a first region and a second region, the first region and the second region of the first subpixel electrode have a polygonal shape where two sides meet in a diagonal line, and one of sides of the polygon, excluding the diagonal line, is perpendicular to the gate line, the first region and the second region of the second subpixel electrode have is grooves disposed at one of sides thereof corresponding to the shape of the first subpixel electrode, the first region and the second region of the first subpixel electrode are connected with each other, and the first region and the second region of the second subpixel electrode are connected with each other. 2 . The liquid crystal display of claim 1 , wherein the first subpixel electrode comprises a vertical stem that is perpendicular to the gate line, a horizontal stem connected with the vertical stem and perpendicular to the vertical stem, and a plurality of minute branches extended in lateral diagonal directions from the horizontal stem. 3 . The liquid crystal display of claim 2 , wherein the length of the minute branches is the longest in a portion close to the vertical stem and is gradually decreased away from the vertical stem. 4 . The liquid crystal display of claim 3 , wherein the vertical stem of the first region of the first subpixel electrode and the vertical stem of the second region of the first subpixel electrode are located at opposite sides. 5 . The liquid crystal display of claim 3 , wherein the vertical stem of the first region of the first subpixel electrode and the vertical stem of the second region of the first subpixel electrode are located at the same side. 6 . The liquid crystal display of claim 1 , wherein an extended line crossing the first region of the second subpixel electrode is disposed in the first region of the first subpixel electrode, and the extended line is connected with the second region of the first subpixel electrode. 7 . The liquid crystal display of claim 6 , comprising: a first drain electrode and a second drain electrode disposed on the insulating layer; and a passivation layer disposed on the first drain electrode and the second drain electrode, wherein a first contact hole extending to the first drain electrode and a second contact hole extending to the second drain electrode are disposed in the passivation layer, and the extended line connecting the first region of the first subpixel electrode and the second region of the first subpixel electrode contacts the first drain electrode through the first contact hole. 8 . The liquid crystal display of claim 1 , wherein the second subpixel electrode comprises a vertical stem perpendicular to the gate line, a plurality of horizontal stems connected to the vertical stem and perpendicular to the vertical stem, and a plurality of minute branches extended in lateral diagonal directions from the horizontal stems. 9 . The liquid crystal display of claim 8 , wherein the plurality of horizontal stems are respectively located in upper, middle, and lower portions of each region of the first region and the second region of the second subpixel electrode, and the horizontal stems in the upper and lower portions are longer than the horizontal stems in the middle portion. 10 . The liquid crystal display of claim 9 , wherein, in the first region or the second region of the second subpixel electrode, the horizontal stem in the middle portion is removed. 11 . The liquid crystal display of claim 10 , wherein the vertical stem in the first region of the second subpixel electrode and the vertical stem in the second region of the second subpixel electrode are located at opposite sides. 12 . The liquid crystal display of claim 10 , wherein the vertical stem of the first region of the second subpixel electrode and the vertical stem of the second region of the second subpixel electrode are located at the same side. 13 . The liquid crystal display of claim 1 , wherein the first region of the second subpixel electrode and the second region of the second subpixel electrode are connected through an extended line of the second subpixel electrode, and the extended line of the second subpixel electrode extends to the outside of the first subpixel electrode or extends while crossing an area where the gate line is disposed. 14 . The liquid crystal display of claim 1 , comprising: a first drain electrode and a second drain electrode disposed on the insulating layer; and a passivation layer disposed on the first drain electrode and the second drain electrode, wherein a first contact hole extending to the first drain electrode and a second contact hole extending to the second drain electrode are disposed in the passivation layer, and an extended line connecting the first region of the second subpixel electrode and the second region of the second subpixel electrode contacts the second drain electrode through the second contact hole. 15 . The liquid crystal display of claim 1 , comprising: a second substrate corresponding to the first substrate; a common electrode disposed on the second substrate; and a liquid crystal layer provided between the first substrate and the second substrate, wherein a voltage configured to be applied to the first subpixel electrode and a voltage configured to be applied to the second subpixel electrode are different from each other. 16 . The liquid crystal display of claim 1 , wherein alignment layers are provided on the first subpixel electrode and the second subpixel electrode, each alignment layer has a pretilt of a predetermined angle, and a pretilt angle formed in an alignment layer on the first subpixel electrode is greater than a pretilt angle formed in an alignment layer on the second subpixel electrode. 17 . The liquid crystal display of claim 1 , wherein the first subpixel electrode and the second subpixel electrode do not overlap each other. 18 . The liquid crystal display of claim 1 , wherein the liquid crystal display is a curved display. 19 . The liquid crystal display of claim 1 , wherein the first region is provided above the gate line and the second region is provided below the gate line. 20 . The liquid crystal display of claim 1 , wherein the first region and the second region of the first subpixel electrode are disposed in the shape of a triangle, and the first region and the second region of the second subpixel electrode are disposed in the shape of a quadrangle having a triangular-shaped groove disposed in one side thereof corresponding to the first subpixel electrode.
Wiring, e.g. gate line, drain line · CPC title
Through-hole connection of the pixel electrode to the active element through an insulation layer · CPC title
Physics · mapped topic
characterised by their geometrical arrangement · CPC title
Subdivided pixels, e.g. for grey scale or redundancy · CPC title
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