Circuitry and methods for time division duplex carrier aggregation

Patent metadata

Field	Value
Publication number	US-2016149690-A1
Application number	US-201514939272-A
Country	US
Kind code	A1
Filing date	Nov 12, 2015
Priority date	Nov 21, 2014
Publication date	May 26, 2016
Grant date	—

Abstract

Circuitry includes an antenna node, a number of input/output nodes, radio frequency (RF) multiplexer circuitry, and bypass circuitry. The RF multiplexer circuitry is coupled between the input/output nodes and the antenna node. The bypass circuitry is coupled to the input/output nodes and the antenna node. The bypass circuitry is configured to, in each uplink time slot of a TDD frame, couple one of the input/output nodes directly to the antenna node such that the RF multiplexer circuitry is bypassed. Further, the bypass circuitry is configured to, in each downlink time slot of the TDD frame, couple each one of the input/output nodes to the antenna node via the RF multiplexer circuitry.

First claim

What is claimed is:

1 . Circuitry comprising:
an antenna node; a plurality of input/output nodes; RF multiplexer circuitry coupled between the plurality of input/output nodes and the antenna node, the RF multiplexer circuitry configured to:
pass RF signals within a first frequency band between the antenna node and a first one of the plurality of input/output nodes, while attenuating RF signals outside the first frequency band; and
pass RF signals about a second frequency band between the antenna node and a second one of the plurality of input/output nodes, while attenuating RF signals outside the second frequency band; and
bypass circuitry coupled to the plurality of input/output nodes and the antenna node and configured to:
in each uplink time slot of a time division duplex (TDD) frame, couple one of the plurality of input/output nodes directly to the antenna node such that the RF multiplexer circuitry is bypassed; and
in each downlink time slot of the TDD frame, couple each one of the plurality of input/output nodes to the antenna node via the RF multiplexer circuitry.

2 . The circuitry of claim 1 wherein the bypass circuitry is further configured to, in each uplink time slot of the TDD frame:
isolate the each one of the plurality of input/output nodes not coupled directly to the antenna node from the RF multiplexer circuitry; and
isolate the antenna node from the RF multiplexer circuitry.

3 . The circuitry of claim 2 wherein the bypass circuitry is further configured to, in each downlink time slot of the TDD frame:
directly couple the antenna node to the RF multiplexer circuitry; and
directly couple each one of the plurality of input/output nodes to the RF multiplexer circuitry.

4 . The circuitry of claim 1 wherein the bypass circuitry comprises:
first bypass circuitry configured to selectively couple the plurality of input/output nodes to the RF multiplexer circuitry; and
second bypass circuitry configured to selectively couple the antenna node to the RF multiplexer circuitry.

5 . The circuitry of claim 4 wherein the bypass circuitry further comprises control circuitry configured to operate the first bypass circuitry and the second bypass circuitry.

6 . The circuitry of claim 1 wherein in each uplink time slot of the TDD frame, a transmit signal is provided at the first one of the plurality of input/output nodes and the second one of the plurality of input/output nodes such that the transmit signal is delivered directly from the first one of the plurality of input/output nodes and the second one of the plurality of input/output nodes to the antenna node.

7 . The circuitry of claim 6 wherein in each downlink time slot of the TDD frame, a receive signal is provided at the antenna node, where RF signals within the first frequency band and RF signals within the second frequency band are simultaneously delivered to the first one of the plurality of input/output nodes and the second one of the plurality of input/output nodes, respectively.

8 . The circuitry of claim 1 wherein in each uplink time slot of the TDD frame an insertion loss between the first one of the plurality of input/output nodes and the second one of the plurality of input/output nodes and the antenna node is between about 0.3 dB and 1.0 dB.

9 . The circuitry of claim 8 wherein in each downlink time slot of the TDD frame an insertion loss between the antenna node and each one of the plurality of input/output nodes is between about 1.3 dB and 2.2 dB.

10 . The circuitry of claim 1 further comprising:
first duplexer circuitry coupled to the first one of the plurality of input/output nodes and configured to pass transmit signals within the first frequency band between a first transmit node and the first one of the plurality of input/output nodes while attenuating other RF signals, and pass receive signals within the first frequency band between the first one of the plurality of input/output nodes and a first receive node while attenuating other RF signals; and
second duplexer circuitry coupled to the second one of the plurality of input/output nodes and configured to pass transmit signals within the second frequency band between a second transmit node and the second one of the plurality of input/output nodes while attenuating other RF signals, and pass receive signals within the second frequency band between the second one of the plurality of input/output nodes and a second receive node while attenuating other RF signals.

11 . The circuitry of claim 1 further comprising an antenna coupled to the antenna node.

12 . The circuitry of claim 11 further comprising transceiver circuitry coupled to the plurality of input/output nodes.

13 . The circuitry of claim 1 wherein the first frequency band and the second frequency band are different long term evolution (LTE) TDD operating bands.

14 . A method comprising:
in each uplink time slot of a time division duplex (TDD) frame, coupling one of a plurality of input/output nodes directly to an antenna node such that RF multiplexer circuitry is bypassed and a radio frequency (RF) transmit signal provided at the one of the plurality of input/output nodes is provided directly to the antenna node; and in each downlink time slot of the TDD frame, coupling the antenna node to each of the plurality of input/output nodes via the RF multiplexer circuitry such that RF receive signals provided at the antenna node are separated into RF signals within a first frequency band, which are selectively delivered to a first one of the plurality of input/output nodes, and RF signals within a second frequency band, which are selectively delivered to a second one of the plurality of input/output nodes.

15 . The method of claim 14 further comprising, in each uplink time slot of the TDD frame:
isolating each one of the plurality of input/output nodes not coupled directly to the antenna node from the RF multiplexer circuitry; and
isolating the antenna node from the RF multiplexer circuitry.

16 . The method of claim 15 further comprising, in each downlink time slot of the TDD frame:
directly coupling the antenna node to the RF multiplexer circuitry; and
directly coupling each one of the plurality of input/output nodes to the RF multiplexer circuitry.

17 . The method of claim 14 further comprising, in each uplink time slot of the TDD frame, providing the RF transmit signal to the one of the plurality of input/output nodes.

18 . The method of claim 14 wherein in each uplink time slot of the TDD frame an insertion loss between the one of the plurality of input/output nodes and the antenna node is between about 0.3 dB and 1.0 dB.

19 . The method of claim 18 wherein in each downlink time slot of the TDD frame an insertion loss between the antenna node and each one of the plurality of input/output nodes is between about 1.3 dB and 2.2 dB.

20 . The method of claim 14 wherein the first frequency band and the second frequency band are different long term evolution (LTE) TDD operating bands.

Assignees

• Rf Micro Devices Inc

Inventors

• Khlat Nadim

Classifications

• H04L5/001 Primary

  the frequencies being arranged in component carriers · CPC title

• H04B7/12

  Frequency diversity · CPC title

• H04L5/1469

  using time-sharing · CPC title

• H04L5/06

  the signals being represented by different frequencies (combined with time-division multiplexing H04L5/26) · CPC title

• H04W72/0446 Primary

  Resources in time domain, e.g. slots or frames · CPC title