Protection circuit

Patent metadata

Field	Value
Publication number	US-2016149392-A1
Application number	US-201414587611-A
Country	US
Kind code	A1
Filing date	Dec 31, 2014
Priority date	Nov 25, 2014
Publication date	May 26, 2016
Grant date	—

Abstract

A protection circuit includes a first and a second input terminal, an output terminal, a first and a second switch circuit. The first switch circuit includes a first, a second, and a third coupling terminal. The second switch circuit includes a fourth coupling terminal, a fifth coupling terminal, and a sixth coupling terminal. The first coupling terminal and the fourth coupling terminal connect to the first input terminal. The second coupling terminal connects to the second input terminal. The third coupling terminal connects to the fifth coupling terminal. The sixth coupling terminal connects to the output terminal. When the first input terminal receives a high level signal and the second input terminal is not coupled, the first switch circuit is switched on, the fifth coupling terminal receives a low level signal, the second switch circuit is switched off, and the output terminal outputs the low level signal.

First claim

What is claimed is:

1 . A protection circuit comprising:
a first input terminal; a second input terminal; an output terminal; a first switch circuit comprising a first coupling terminal coupled to the first input terminal, a second coupling terminal coupled to the second input terminal, and a third coupling terminal; and a second switch circuit comprising a fourth coupling terminal coupled to the first input terminal, a fifth coupling terminal coupled to the third coupling terminal, and a sixth coupling terminal coupled to the output terminal; wherein when the first input terminal receives a high level signal and the second input terminal is not coupled, the first switch circuit is switched on, the fifth coupling terminal receives a low level signal, the second switch circuit is switched off, the output terminal outputs a low level signal.

2 . The protection circuit of claim 1 , wherein when the first input terminal receives a high level signal and the second input terminal is grounded, the first switch circuit is switched off, the fifth coupling terminal receives a high level signal, the second switch circuit is switched on, and the output terminal outputs a high level signal.

3 . The protection circuit of claim 2 , wherein the first switch circuit comprises a first transistor, when the first input terminal receives a high level signal and the second input terminal is grounded, the second coupling terminal receives a low level signal, and the first transistor is switched off.

4 . The protection circuit of claim 3 , wherein a grid terminal of the first transistor is coupled to the second input terminal, a drain terminal of the first transistor is coupled to the second switch circuit, and a source terminal of the first transistor is grounded.

5 . The protection circuit of claim 3 , wherein the second switch circuit comprises a second transistor and a third transistor, a grid terminal of the second transistor is coupled to the drain terminal of the first transistor, a drain terminal of the second transistor is coupled to a grid terminal of the third transistor, a source terminal of the second transistor is grounded, and when the first transistor is switched off, the second transistor and the third transistor are switched on.

6 . The protection circuit of claim 5 , wherein a source terminal of the third transistor is coupled to the first input terminal, and a drain terminal of the third transistor is coupled to the output terminal.

7 . The protection circuit of claim 5 , wherein the second switch circuit further comprises a resistor, and the resistor is coupled to the drain terminal of the second transistor and the grid terminal of the third transistor.

8 . The protection circuit of claim 5 , wherein the second switch circuit further comprises a resistor, and the resistor is coupled to the first input terminal and the grid terminal of the third transistor.

9 . The protection circuit of claim 5 , wherein the first transistor and the second transistor are N-typed field-effect transistors, and the third transistor is a P-typed field-effect transistor.

10 . A protection circuit comprising:
a first input terminal; a second input terminal; an output terminal; a first switch circuit comprising a first transistor, and the first transistor coupled to the first input terminal and the second input terminal; and a second switch circuit comprising a second transistor and a third transistor, the second transistor coupled to the first transistor and the third transistor, and the third transistor coupled to the first input terminal and the output terminal; wherein when the first input terminal receives a high level signal and the second input terminal is not coupled, the first transistor is switched on, the second transistor and a third transistor are switched off, the output terminal outputs a low level signal.

11 . The protection circuit of claim 10 , wherein when the first input terminal receives a high level signal and the second input terminal is grounded, the first transistor is switched off, the second transistor and a third transistor are switched on, and the output terminal outputs a low high signal.

12 . The protection circuit of claim 10 , wherein the first transistor, the second transistor, and the third transistor are three field-effect transistors.

13 . The protection circuit of claim 12 , wherein the first transistor and the second transistor are N-typed field-effect transistors, and the third transistor is P-typed field-effect transistor.

14 . The protection circuit of claim 12 , wherein a grid terminal of the first transistor is coupled to the second input terminal, a drain terminal of the first transistor is coupled to the second switch circuit, and a source terminal of the first transistor is grounded.

15 . The protection circuit of claim 12 , wherein a grid terminal of the second transistor is coupled to the drain terminal of the first transistor, a drain terminal of the second transistor is coupled to a grid terminal of the third transistor, a source terminal of the second transistor is grounded, and when the first transistor is switched off, the second transistor and the third transistor are switched on.

16 . The protection circuit of claim 12 , wherein a source terminal of the third transistor is coupled to the first input terminal, and a drain terminal of the third transistor is coupled to the output terminal.

17 . The protection circuit of claim 12 , wherein the second switch circuit further comprises a resistor, and the resistor is coupled to the drain terminal of the second transistor and the grid terminal of the third transistor.

18 . The protection circuit of claim 12 , wherein the second switch circuit further comprises a resistor, and the resistor is coupled to the first input terminal and the grid terminal of the third transistor.

Assignees

• Hon Hai Prec Ind Co Ltd

Inventors

• Tseng Hsiang-Pin

Classifications

• H02H3/20 Primary

  responsive to excess voltage · CPC title

• H02H11/00 Primary

  Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result · CPC title