Radiation detector comprising a compensating sensor

US2016149105A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016149105-A1
Application numberUS-201514951554-A
CountryUS
Kind codeA1
Filing dateNov 25, 2015
Priority dateNov 25, 2014
Publication dateMay 26, 2016
Grant date

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A chip for radiation measurements, the chip comprising a first substrate comprising a first sensor and a second sensor. The chip moreover comprises a second substrate comprising a first cavity and a second cavity both with oblique walls. An internal layer is present on the inside of the second cavity. The second substrate is sealed to the first substrate with the cavities on the inside such that the first cavity is above the first sensor and the second cavity is above the second sensor.

First claim

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1 . A chip for radiation measurements, the chip comprising a first substrate comprising at least a first sensor and a second sensor, a second substrate comprising at least a first cavity and a second cavity both with oblique walls, wherein an internal layer preventing radiation from reaching the second sensor is present on the inside of the second cavity, and wherein the second substrate is sealed to the first substrate with the cavities on the inside such that the first cavity is above the first sensor and the second cavity is above the second sensor. 2 . A chip according to claim 1 , wherein the internal layer is a reflective layer. 3 . A chip according to claim 1 , wherein the internal layer is an absorption layer. 4 . A chip according to claim 1 wherein the height of the second cavity is smaller than the height of the first cavity. 5 . A chip according to claim 1 wherein a barrier is present between the first cavity and the second cavity and wherein the internal layer is present on the inside of the second cavity and at least partly on the barrier. 6 . A chip according to claim 5 , wherein the barrier is sealed to the first substrate. 7 . A chip according to claim 5 , wherein a channel is present between the barrier and the first substrate extending from the first cavity towards the second cavity. 8 . A chip according to claim 5 , wherein the barrier is partially sealed to the first substrate leaving a channel between the barrier and the first substrate whereby the channel extends from the first cavity to the second cavity. 9 . A chip according to claim 1 , wherein the internal layer also partly covers the inside of the first cavity. 10 . A chip according to claim 1 , wherein the first sensor and/or the second sensor are thermopile sensors. 11 . A method for manufacturing a chip for radiation measurements the method comprising a first step wherein a first cavity and a second cavity with oblique walls are etched in a second substrate, a next step wherein an internal layer is applied on the inner side of at least one of the cavities, a next step wherein the second substrate is sealed to a first substrate comprising radiation sensors, such that the cavities enclose the radiation sensors. 12 . A method according to claim 11 , wherein the etching in the first step is potassium hydroxide etching. 13 . A method according to claim 11 , wherein in the sealing step no bond material is applied between the wall separating the two cavities and the first substrate.

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Classifications

  • Passive compensation of pyrometer measurements, e.g. using ambient temperature sensing or sensing of temperature within housing · CPC title

  • for shielding light, e.g. light blocking layers or cold shields for infrared detectors · CPC title

  • the at least one element covered by H10F30/00 having potential barriers, e.g. integrated devices comprising photodiodes or phototransistors · CPC title

  • Integrated devices · CPC title

  • the devices being sensitive to infrared radiation, visible or ultraviolet radiation, and having no potential barriers, e.g. photoresistors · CPC title

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What does patent US2016149105A1 cover?
A chip for radiation measurements, the chip comprising a first substrate comprising a first sensor and a second sensor. The chip moreover comprises a second substrate comprising a first cavity and a second cavity both with oblique walls. An internal layer is present on the inside of the second cavity. The second substrate is sealed to the first substrate with the cavities on the inside such tha…
Who is the assignee on this patent?
Melexis Technologies Nv
What technology area does this patent fall under?
Primary CPC classification H10F77/50. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).