Semiconductor device and manufacturing method thereof
US-2015076491-A1 · Mar 19, 2015 · US
US2016149042A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016149042-A1 |
| Application number | US-201514747594-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 23, 2015 |
| Priority date | Nov 26, 2014 |
| Publication date | May 26, 2016 |
| Grant date | — |
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Provided is a semiconductor device, including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in order, in which the oxide semiconductor film includes a first region portion and a second region portion. The oxide semiconductor film includes indium (In), zinc (Zn), and one or more of tin (Sn), gallium (Ga), and aluminum (Al). The first region portion is located, in a thickwise direction, in vicinity of an interface between the oxide semiconductor film and the gate insulating film, in the oxide semiconductor film. A composition ratio of the one or more of tin, gallium, and aluminum in the first region portion is higher than a composition ratio of the one or more of tin, gallium, and aluminum in the second region portion.
Opening claim text (preview).
What is claimed is: 1 . A semiconductor device, comprising a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in order, the oxide semiconductor film including a first region portion and a second region portion, wherein the oxide semiconductor film includes indium (In), zinc (Zn), and one or more of tin (Sn), gallium (Ga), and aluminum (Al), the first region portion is located, in a thickwise direction, in vicinity of an interface between the oxide semiconductor film and the gate insulating film, in the oxide semiconductor film, and a composition ratio of the one or more of tin, gallium, and aluminum in the first region portion is higher than a composition ratio of the one or more of tin, gallium, and aluminum in the second region portion. 2 . The semiconductor device according to claim 1 , wherein the oxide semiconductor film includes a channel region that forms the interface between the oxide semiconductor film and the gate insulating film, and the first region portion extends over the channel region in an in-plane direction. 3 . The semiconductor device according to claim 1 , wherein the oxide semiconductor film includes a channel region that forms the interface between the oxide semiconductor film and the gate insulating film, and the first region portion is located in vicinity of a periphery of the channel region in an in-plane direction. 4 . The semiconductor device according to claim 1 , wherein a composition ratio of indium in the first region portion is lower than a composition ratio of indium in the second region portion. 5 . The semiconductor device according to claim 1 , further comprising a substrate and a retention capacitor, wherein the transistor and the retention capacitor are provided on the substrate. 6 . The semiconductor device according to claim 4 , wherein the transistor includes the oxide semiconductor film, the gate insulating film, and the gate electrode stacked in order over a region of the substrate, and the retention capacitor includes the oxide semiconductor film, a first conductive film, an insulating film, and a second conductive film stacked in order over another region of the substrate. 7 . The semiconductor device according to claim 1 , wherein the oxide semiconductor film includes a channel region and a pair of low resistance regions, the channel region forming the interface between the oxide semiconductor film and the gate insulating film, and the pair of low resistance regions being located adjacent to the channel region and having lower resistance than resistance of the channel region. 8 . The semiconductor device according to claim 1 , wherein the first region portion includes phosphorus (P). 9 . A method of manufacturing a semiconductor device, comprising: forming, on a substrate, an oxide semiconductor film including indium (In), zinc (Zn), and one or more of tin (Sn), gallium (Ga), and aluminum (Al); and stacking a gate insulating film and a gate electrode in order on the oxide semiconductor film to form a transistor, after increasing a composition ratio of the one or more of tin, gallium, and aluminum in vicinity of an upper surface of the oxide semiconductor film. 10 . The method of manufacturing the semiconductor device according to claim 9 , wherein the composition ratio of the one or more of tin, gallium, and aluminum is increased by removing part of indium in the vicinity of the upper surface of the oxide semiconductor film. 11 . The method of manufacturing the semiconductor device according to claim 10 , wherein etching treatment is performed on the upper surface of the oxide semiconductor film to remove part of indium in the vicinity of the upper surface of the oxide semiconductor film. 12 . The method of manufacturing the semiconductor device according to claim 11 , wherein the etching treatment is performed with an etchant including phosphoric acid. 13 . A display unit provided with a display element and a semiconductor device configured to drive the display element, the semiconductor device comprising a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in order, the oxide semiconductor film including a first region portion and a second region portion, wherein the oxide semiconductor film includes indium (In), zinc (Zn), and one or more of tin (Sn), gallium (Ga), and aluminum (Al), the first region portion is located, in a thickwise direction, in vicinity of an interface between the oxide semiconductor film and the gate insulating film, in the oxide semiconductor film, and a composition ratio of the one or more of tin, gallium, and aluminum in the first region portion is higher than a composition ratio of the one or more of tin, gallium, and aluminum in the second region portion. 14 . An electronic apparatus provided with a display unit including a display element and a semiconductor device configured to drive the display element, the semiconductor device comprising a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in order, the oxide semiconductor film including a first region portion and a second region portion, wherein the oxide semiconductor film includes indium (In), zinc (Zn), and one or more of tin (Sn), gallium (Ga), and aluminum (Al), the first region portion is located, in a thickwise direction, in vicinity of an interface between the oxide semiconductor film and the gate insulating film, in the oxide semiconductor film, and a composition ratio of the one or more of tin, gallium, and aluminum in the first region portion is higher than a composition ratio of the one or more of tin, gallium, and aluminum in the second region portion.
Formation by thermal treatments (formation by plasma treatment H10P14/6319) · CPC title
Formation by plasma treatments, e.g. plasma oxidation of the substrate · CPC title
of a metallic layer · CPC title
Chemical treatments · CPC title
Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title
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