Method and apparatus for using a pre-clock enable command for power management modes

Patent metadata

Field	Value
Publication number	US-2016148653-A1
Application number	US-201615011383-A
Country	US
Kind code	A1
Filing date	Jan 29, 2016
Priority date	Mar 15, 2013
Publication date	May 26, 2016
Grant date	—

Abstract

Provided are a method and apparatus for using a pre-clock enable (pre-CKE) command for power management modes. A host memory controller sends a pre-CKE command to a memory module over a bus indicating at least one power management operation to perform. The host memory controller further asserts a clock enable (CKE) signal to the memory module over the bus after sending the pre-CKE command to cause a memory module controller to execute the indicated at least one power management operation in response to the CKE signal.

First claim

1 . An apparatus coupled to a memory module over a bus, comprising:
host memory controller logic to:
send a pre-clock enable (pre-CKE) command to the memory module over the bus indicating at least one power management operation to perform; and
assert a clock enable (CKE) signal to the memory module over the bus after sending the pre-CKE command to cause a memory module controller to execute the indicated at least one power management operation in response to the CKE signal.

2 . The apparatus of claim 1 , wherein the pre-CKE command indicates one of a plurality of power management states, wherein the indicated at least one power management operation comprises a plurality of operations performed to configure the memory module to the indicated power management state.

3 . The apparatus of claim 2 , wherein each of the power management states comprise different power management sleep states where different levels of power are applied to different components in the memory module in the different sleep states, wherein asserting the CKE signal causes the memory module controller to perform operations to enter into the power management sleep state specified in the pre-CKE command.

4 . An apparatus coupled to a host memory controller over a bus, comprising:
memory module controller logic for a memory module to:
receive a pre-clock enable (pre-CKE) command from the host memory controller over the bus indicating at least one power management operation to perform;
detect a clock enable (CKE) signal after receiving the pre-CKE command; and
execute the indicated at least one power management operation in the pre-CKE command in response to the CKE signal.

5 . The apparatus of claim 4 , wherein the memory module controller logic further:
sets a register to indicate the at least one power management operation; and determines the at least one power management operation to perform by reading the register in response to the CKE signal.

6 . The apparatus of claim 5 wherein the memory module controller logic further:
performs a default CKE handling operation in response to the register not indicating at least one power management operation to perform.

7 . The apparatus of claim 4 , wherein the pre-CKE command indicates one of a plurality of power management states, wherein the executed indicated at least one power management operation comprises a plurality of operations performed to configure the memory module to the indicated power management state.

8 . The apparatus of claim 4 , wherein each of the power management states comprise different power management sleep states where different levels of power are applied to different components in the memory module in different sleep states, wherein executing the indicated at least one power management operation enters into the power management sleep state specified in the pre-CKE command.

9 . A system, comprising
a host memory controller; a memory module; a bus coupling the host memory controller and the memory module; wherein the host memory controller includes host memory logic to:
send a pre-clock enable (pre-CKE) command to the memory module over the bus indicating at least one power management operation to perform; and
assert a clock enable (CKE) signal to the memory module over the bus after sending the pre-CKE command to cause a memory module controller to execute the indicated at least one power management operation in response to the CKE signal.

10 . The system of claim 9 , wherein the pre-CKE command indicates one of a plurality of power management states, wherein the indicated at least one power management operation comprises a plurality of operations performed to configure the memory module to the indicated power management state.

11 . The system of claim 10 , wherein each of the power management states comprise different sleep states where different levels of power are applied to different components in the memory module in the different sleep states, wherein sending the CKE signal causes the memory module controller to perform operations to enter into the power management sleep state specified in the pre-CKE command.

12 . The system of claim 9 , wherein the memory module includes memory module controller logic to:
receive the pre-CKE command indicating at least one power management operation to perform; detect the CKE signal after receiving the pre-CKE command; and execute the indicated at least one power management operation in the pre-CKE command in response to the CKE signal.

13 . The system of claim 12 , wherein the memory module controller logic further:
sets a register to indicate the at least one power management operation; and determines the at least one power management operation to perform by reading the register in response to the CKE signal.

14 . The system of claim 13 wherein the memory module controller logic further:
performs a default CKE handling operation in response to the register not indicating at least one power management operation to perform.

15 . A method, comprising
sending a pre-clock enable (pre-CKE) command to a memory module over a bus indicating at least one power management operation to perform; and assert a clock enable (CKE) signal to the memory module over the bus after sending the pre-CKE command to cause the memory module to execute the indicated at least one power management operation in response to the CKE signal.

16 . The method of claim 15 , wherein the pre-CKE command indicates one of a plurality of power management states, wherein the indicated at least one power management operation comprises a plurality of operations performed to configure the memory module to the indicated power management state.

17 . The method of claim 16 , wherein each of the power management states comprise different sleep states where different levels of power are applied to different components in the memory module in the different sleep states, wherein sending the CKE signal causes the memory module to perform operations to enter into the power management sleep state specified in the pre-CKE command.

18 . The method of claim 15 , further comprising:
receiving the pre-CKE command indicating at least one power management operation to perform; detecting the CKE signal after receiving the pre-CKE signal; and executing the indicated at least one power management operation in the pre-CKE command in response to the CKE signal.

19 . The method of claim 18 , further comprising:
setting a register to indicate the at least one power management operation; and determining the at least one power management operation to perform by reading the register in response to the CKE signal.

20 . The method of claim 19 , further comprising:
performing a default CKE handling operation in response to the register not indicating at least one power management operation to perform.

Assignees

• Intel Corp

Inventors

• Nale Bill

Classifications

• G11C29/028

  with adaption or trimming of parameters · CPC title

• G11C7/1063

  Control signal output circuits, e.g. status or busy flags, feedback command signals · CPC title

• G06F3/0683

  Plurality of storage devices · CPC title

• G11C11/40618

  Refresh operations over multiple banks or interleaving · CPC title

• G06F2212/2532

  comprising a plurality of modules · CPC title