Self-measuring nonvolatile memory device systems and methods

US2016147997A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016147997-A1
Application numberUS-201414549418-A
CountryUS
Kind codeA1
Filing dateNov 20, 2014
Priority dateNov 20, 2014
Publication dateMay 26, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

One embodiment describes a computing system that includes a boot device. The boot device includes nonvolatile memory that stores startup routine instructions and a first pointer, in which the first pointer identifies a first one or more memory addresses in the nonvolatile memory where at least a portion of the startup routine instructions are stored, and a microcontroller that retrieves the startup routine instructions from the nonvolatile memory using the first pointer and determines whether the startup routine instructions are corrupted before executing any portion of the startup routine instructions. The computing system further includes a central processor communicatively coupled to the boot device, in which the central processor executes the startup routine instructions to initialize the computing system when the microcontroller determines that the startup routine instructions are not corrupted.

First claim

Opening claim text (preview).

What is claimed is: 1 . A computing system, comprising: a boot device comprising: nonvolatile memory configured to store startup routine instructions and a first pointer, wherein the first pointer is configured to identify a first one or more memory addresses in the nonvolatile memory where at least a portion of the startup routine instructions are stored; and control logic configured to retrieve the startup routine instructions from the nonvolatile memory using the first pointer and to determine whether the startup routine instructions are corrupted before execution any portion of the startup routine instructions by the computing system; and a central processor communicatively coupled to the boot device, wherein the central processor is configured to execute the startup routine instructions to initialize the computing system when the control logic determines that the startup routine instructions are not corrupted. 2 . The computing system of claim 1 , wherein, when the startup routine instructions are updated, the control logic is configured to update the first pointer from identifying the first one or more memory addresses to a second one or more memory addresses. 3 . The computing system of claim 1 , wherein the nonvolatile memory is configured to store a second pointer, wherein the first pointer is configured to identify the first one or more memory addresses where a first portion of the startup routine instructions are stored and the second pointer is configured to identify a second one or more memory address where a second portion of the startup routine instructions are stored. 4 . The computing system of claim 3 , wherein the nonvolatile memory is configured to store the first pointer and the second pointer as a list in a pointer register, wherein the control logic is configured to link the first portion of the startup routine instructions with a second portion of the startup routine instructions based at least in part on the list of pointers. 5 . The computing system of claim 1 , wherein the first pointer comprises an address parameter and a size parameter, wherein the address parameter is configured to indicate a first memory address in the nonvolatile memory where the at least a portion of the startup routine instructions are stored and the size parameter is configured to indicate number of memory address following the first memory address that store the at least a portion of the startup routine instructions. 6 . A method to update startup routine instructions in a computing device, comprising: cryptographically signing, using a host system, a start pointer update instruction to produce a signed start pointer update instruction; transmitting, using the host system, the signed start pointer update instruction to a boot device to instruct the boot device to initialize pointer updating; cryptographically signing, using the host system, a first pointer update instruction to produce a signed first pointer update instruction; transmitting, using the host system, the signed first pointer update instruction to the boot device to instruct the boot device to update a first pointer to identify a first one or more memory addresses in the boot device, wherein the first pointer is configured to facilitate detecting a corruption in the startup routine instructions before execution by identifying that at least a portion of the startup routine instructions are stored at the first one or more memory addresses; cryptographically signing, using the host system, a finish pointer update instruction to produce a signed finish pointer update instruction; and transmitting, using the host system, the signed finish pointer update instruction to the boot device to instruct the boot device to finalize the pointer updating. 7 . The method of claim 6 , comprising instructing the boot device to verify accuracy of the update to the first pointer before transmitting the signed finish pointer update instruction, wherein instructing the boot device to verify accuracy comprises instructing the boot device to test the startup routine instructions using the updated first pointer. 8 . The method of claim 6 , comprising: cryptographically signing a second pointer update instruction to produce a signed second pointer update instruction; transmitting the signed second pointer update instruction to the boot device to instruct the boot device to update a second pointer to identify a second one or more memory addresses in the boot device, wherein the second pointer is configured to facilitate detecting a corruption in the startup routine instructions by identifying that at least a portion of the startup routine instructions are stored at the second one or more memory addresses. 9 . The method of claim 6 , wherein the first one or more memory addresses are contiguous memory addresses in nonvolatile memory of the boot device. 10 . The method of claim 6 , wherein: cryptographically signing the start pointer update instruction comprises generating a first signature by performing a cryptographic hash operation on the start update instruction; transmitting the signed start pointer update instruction comprises transmitting the start pointer update instruction with the first signature, wherein the boot device is configured to verify the first signature before initializing pointer updating; cryptographically signing the first pointer update instruction comprises generating a second signature by performing the cryptographic hash operation on the first pointer update instruction; transmitting the signed first pointer update instruction comprises transmitting the first pointer update instruction with the second signature, wherein the boot device is configured to verify the second signature before updating the first pointer; cryptographically signing the finish pointer update instruction comprises generating a third signature by performing the cryptographic hash operation on the finish pointer update instruction; and transmitting the signed finish pointer update instruction comprises transmitting the finish pointer update instruction with the third signature, wherein the boot device is configured to verify the third signature before finalizing pointer updating. 11 . The method of claim 6 , comprising instructing the boot device to determine that the update to the first pointer is incomplete when the boot device does not receive and verify the signed finish pointer update instruction. 12 . A tangible, non-transitory, computer readable medium configured to store instructions executable by a processor in a nonvolatile memory device, wherein the instructions comprise instructions to: initialize, using the processor, pointer updating when a received signed start pointer update instruction is verified; update, using the processor, one or more pointers to identify memory addresses in the nonvolatile memory device that store startup routine instructions when received signed pointer update instructions are verified, wherein the nonvolatile memory device is configured to detect a corruption in startup routine instructions before execution using the one or more pointers; finalize, using the processor, the pointer updating when a received signed finish pointer update instruction is verified; and stop, using the processor, the pointer updating when the signed start pointer update instruction, any of the one or more signed pointer update instructions, or the signed finish pointer update instruction is unable to be verified. 13 . The computer readable medium of claim 12 , wherein the instructions to update the one or more pointers comprise instructions to: update a first point

Assignees

Inventors

Classifications

  • Test or assess a computer or a system · CPC title

  • using cryptographic hash functions · CPC title

  • involving digital signatures · CPC title

  • G06F21/575Primary

    Secure boot · CPC title

  • Loading of operating system · CPC title

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Frequently asked questions

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What does patent US2016147997A1 cover?
One embodiment describes a computing system that includes a boot device. The boot device includes nonvolatile memory that stores startup routine instructions and a first pointer, in which the first pointer identifies a first one or more memory addresses in the nonvolatile memory where at least a portion of the startup routine instructions are stored, and a microcontroller that retrieves the sta…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G06F21/575. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).