Device and Method for Managing Die Groups
US-2015113203-A1 · Apr 23, 2015 · US
US2016147444A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016147444-A1 |
| Application number | US-201414551016-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 23, 2014 |
| Priority date | Nov 23, 2014 |
| Publication date | May 26, 2016 |
| Grant date | — |
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A method for data storage includes, in a memory that includes multiple memory blocks, assessing a performance characteristic of the multiple memory blocks. At least some of the memory blocks are grouped into groups using a grouping criterion that groups together the memory blocks based on similarity in the assessed performance characteristic. Data is stored in the memory by applying parallel memory access operations in the groups of the memory blocks.
Opening claim text (preview).
1 . A method for data storage, comprising: in a memory that comprises multiple memory blocks, assessing a performance characteristic of the multiple memory blocks; grouping at least some of the memory blocks into groups using a grouping criterion that groups together the memory blocks based on similarity in the assessed performance characteristic; and storing data in the memory by applying parallel memory access operations in the groups of the memory blocks. 2 . The method according to claim 1 , wherein the grouping comprises grouping at least some of the memory blocks based on similarity in memory-cell programming responsiveness. 3 . The method according to claim 2 , wherein the assessed performance characteristic comprises at least one of programming time, erasure time, initial programming voltage, and incremental programming voltage step. 4 . The method according to claim 1 , wherein the grouping comprises grouping at least some of the memory blocks based on similarity in memory-cell storage reliability. 5 . The method according to claim 4 , wherein the assessed performance characteristic comprises at least one of a number of errors following programming, memory-cell voltage distribution following programming, wear level and memory-cell charge retention. 6 . The method according to claim 1 , wherein grouping the memory blocks comprises assigning to a given group memory blocks that differ from one another in the assessed performance characteristic by no more than a predefined difference. 7 . The method according to claim 1 , wherein grouping the memory blocks comprises sorting the memory blocks into classes, each class comprising the memory blocks whose given performance characteristic falls in a respective sub-range associated with the class, and choosing the memory blocks for the given group from a single one of the classes. 8 . The method according to claim 1 , wherein assessing the performance characteristic comprises assessing the performance characteristic during production of the memory or of a host system in which the memory is to operate. 9 . The method according to claim 1 , wherein assessing the performance characteristic and grouping the memory blocks are performed during operation of the memory in a host system. 10 . The method according to claim 1 , wherein grouping the memory blocks comprises modifying assignment of the memory blocks into the groups during operation of the memory in a host system. 11 . The method according to claim 1 , wherein grouping the memory blocks comprises assigning the memory blocks to the given group from at least two different memory devices or storage devices. 12 . A data storage apparatus, comprising: a memory comprising multiple memory blocks; and a processor, which is configured to group at least some of the memory blocks into groups using a grouping criterion that groups together the memory blocks based on similarity in an assessed performance characteristic, and to store data in the memory by applying parallel memory access operations in the groups of the memory blocks. 13 . The apparatus according to claim 12 , wherein the processor groups the memory blocks based on similarity in memory-cell programming responsiveness. 14 . The apparatus according to claim 12 , wherein the processor groups the memory blocks based on similarity in memory-cell storage reliability. 15 . The apparatus according to claim 12 , wherein the processor is configured to assign to the given group of memory blocks that differ from one another in the assessed performance characteristic by no more than a predefined difference. 16 . The apparatus according to claim 12 , wherein the memory blocks are sorted into classes, each class comprising the memory blocks whose assessed performance characteristic falls in a respective sub-range associated with the class, and wherein the processor is configured to choose the memory blocks for the given group from a single one of the classes. 17 . The apparatus according to claim 12 , wherein assessment of the performance characteristic is performed during production of the memory or of a host system in which the memory is to operate. 18 . The apparatus according to claim 12 , wherein the processor is configured to assess the performance characteristic and group the memory blocks during operation of the memory in a host system. 19 . The apparatus according to claim 12 , wherein the processor is configured to modify assignment of the memory blocks into the groups during operation of the memory in a host system. 20 . The apparatus according to claim 12 , wherein the processor is configured to assign the memory blocks to the given group from at least two different memory devices or storage devices.
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