Receive circuit for use in a power converter

US2016141968A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016141968-A1
Application numberUS-201615004422-A
CountryUS
Kind codeA1
Filing dateJan 22, 2016
Priority dateJan 22, 2013
Publication dateMay 19, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multi-die isolated integrated circuit controller includes a magnetically coupled communication link, a transmitter circuit coupled to the magnetically coupled communication link, and a receiver circuit coupled to the magnetically coupled communication link. The transmitter circuit is galvanically isolated from the receiver circuit. The transmitter circuit is coupled to send an input pulse to the receiver circuit by way of the magnetically coupled communication link. The receiver circuit is coupled to receive a receiver voltage by way of the magnetically coupled communication link to generate an output voltage in response to the receiver voltage and a threshold voltage.

First claim

Opening claim text (preview).

What is claimed is: 1 . A multi-die isolated integrated circuit controller, comprising: a magnetically coupled communication link; a transmitter circuit coupled to the magnetically coupled communication link; and a receiver circuit coupled to the magnetically coupled communication link, wherein the transmitter circuit is galvanically isolated from the receiver circuit, wherein the transmitter circuit is coupled to send an input pulse to the receiver circuit by way of the magnetically coupled communication link, wherein the receiver circuit is coupled to receive a receiver voltage by way of the magnetically coupled communication link to generate an output voltage in response to the receiver voltage and a threshold voltage. 2 . The multi-die isolated integrated circuit controller of claim 1 , further comprising a secondary die, wherein the transmitter circuit is included in the secondary die. 3 . The multi-die isolated integrated circuit controller of claim 1 , further comprising a primary die, wherein the receiver circuit is included in the primary die. 4 . The multi-die isolated integrated circuit controller of claim 1 , wherein the input pulse comprises a transmitter current that varies over time. 5 . The multi-die isolated integrated circuit controller of claim 4 , wherein the magnetically coupled communication link comprises a conductive loop. 6 . The multi-die isolated integrated circuit controller of claim 5 , wherein the transmitter current induces a transmitter voltage across the conductive loop. 7 . The multi-die isolated integrated circuit controller of claim 1 , wherein the transmitter circuit is coupled to send consecutive pulses that are separated by a time period to the receiver circuit. 8 . The multi-die isolated integrated circuit controller of claim 7 , wherein the time period has a length determined by a switching period of a switch mode power converter. 9 . The multi-die isolated integrated circuit controller of claim 1 , wherein the receiver circuit is coupled to generate a logic low output voltage in response to the receiver voltage being less than the threshold voltage. 10 . The multi-die isolated integrated circuit controller of claim 1 , wherein the receiver circuit is coupled to generate a logic high output voltage in response to the receiver voltage being greater than the threshold voltage. 11 . The multi-die isolated integrated circuit controller of claim 1 , wherein the multi-die isolated integrated circuit controller is included in a monolithic package. 12 . A method of controlling a receiver circuit for a power converter controller, comprising: receiving an input pulse representative of a state of a power converter; amplifying the input pulse and generating a first output; amplifying the first output and generating a second output; generating an output signal in response to comparing the second output to a threshold voltage; and resetting the first output and the second output to prepare the receiver circuit to receive and amplify subsequent input pulses. 13 . The method of claim 12 , further comprising receiving the output signal and generating a pre-bias control signal in response to the output signal to reset the first output and the second output. 14 . A receiver circuit for use in a power converter controller, comprising: a first amplifier comprising a differential amplifier having a first transistor and a second transistor coupled together at their bases, wherein the first transistor is coupled to receive an input pulse at an emitter of the first transistor and generate a first output; a second amplifier coupled to receive the first output to compare a gate-source voltage of a second transistor to a threshold voltage, wherein the second transistor is coupled to be turned ON in response to the gate-source voltage and the threshold voltage; and an output circuit coupled to the second amplifier to generate an output signal. 15 . The receiver circuit of claim 14 , further comprising: a delay circuit coupled to receive the output signal, wherein the delay circuit is coupled to generate a pre-bias control signal responsive to the output signal; a first pre-bias circuit coupled to an output of the first amplifier, and coupled to receive the pre-bias control signal from the delay circuit; and a second pre-bias circuit coupled to an output of the second amplifier, and coupled to receive the pre-bias control signal from the delay circuit. 16 . The receiver circuit of claim 15 , wherein the delay circuit is coupled to generate a pulse of the pre-bias control signal that is delayed from a corresponding pulse of the output signal by at least a pulse width of the input pulse.

Assignees

Inventors

Classifications

  • Details of arrangements for controlling amplification · CPC title

  • using semiconductor devices only · CPC title

  • having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer · CPC title

  • Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

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What does patent US2016141968A1 cover?
A multi-die isolated integrated circuit controller includes a magnetically coupled communication link, a transmitter circuit coupled to the magnetically coupled communication link, and a receiver circuit coupled to the magnetically coupled communication link. The transmitter circuit is galvanically isolated from the receiver circuit. The transmitter circuit is coupled to send an input pulse to …
Who is the assignee on this patent?
Power Integrations Inc
What technology area does this patent fall under?
Primary CPC classification H02M3/33592. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).