Automatic compilation method and framework for generating a layout of integrated memory-compute circuit
US-2024403527-A1 · Dec 5, 2024 · US
US2016140274A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016140274-A1 |
| Application number | US-201414896877-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 20, 2014 |
| Priority date | Jun 21, 2013 |
| Publication date | May 19, 2016 |
| Grant date | — |
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A first and second set of simulation information of a circuit design may be received. Energy consumption values associated with signals may be calculated for each of the first and second sets of simulation information of the circuit design. The energy consumption values associated with the transitions of the plurality of signals for each time point of a plurality of time points may be aggregated based on when each of the transitions of the signals occurs for each of the first and second sets of simulation information. Furthermore, a possible Differential Power Analysis (DPA) leak may be identified at one of the time points based on a difference in aggregated energy consumption values between the first and second sets of simulation information.
Opening claim text (preview).
What is claimed is: 1 . A method comprising: receiving a first set of simulation information and a second set of simulation information associated with a circuit; calculating energy consumption values associated with transitions of a plurality of signals of the circuit for each of the first and second sets of simulation information associated with the circuit; aggregating the energy consumption values associated with the transitions of the plurality of signals for each time point of a plurality of time points based on when each of the transitions of the plurality of signals occurs for each of the first and second sets of simulation information; and identifying, by a processing device, a possible Differential Power Analysis (DPA) leak at one of the plurality of time points based on a difference of the aggregated energy consumption values between the first and second sets of simulation information. 2 . The method of claim 1 , wherein the identifying of the possible DPA leak is further based on the difference of the aggregated energy consumption values at the one of the plurality of time points exceeding a threshold value of energy consumption difference. 3 . The method of claim 1 , further comprising: providing an energy waveform corresponding to the difference of the aggregated energy consumption values at each of the plurality of time points, wherein the difference of the aggregated energy consumption values at each of the time points identifies the difference of energy consumption of the circuit at each corresponding time point of the plurality of time points. 4 . The method of claim 1 , wherein the calculating of the energy consumption values associated with the transitions of the plurality of signals of the circuit is further based on energy consumption of a cell associated with the circuit. 5 . The method of claim 4 , wherein the energy consumption of the cell is based on a switching energy and an internal energy associated with the cell and is not based on a leakage energy associated with the cell. 6 . The method of claim 1 , wherein the simulation information comprises a first group of simulation information associated with a bit at a first value and a second group of simulation information associated with the same bit at a second value that is different than the first value. 7 . The method of claim 6 , further comprising: identifying the aggregated energy consumption value of a time point of the plurality of time points associated with the first group of simulation information; and identifying the aggregated energy consumption value of a corresponding time point associated with the second group of simulation information, wherein the identifying of the possible DPA leak at one of the plurality of time points based on the difference of the aggregated energy consumption values of the time point is further based on the time point associated with the first group of simulation information and the corresponding time point associated with the second group of simulation information. 8 . A system comprising: a memory; and a processing device coupled with the memory to: receive simulation information of a circuit design associated with a circuit; calculate energy consumption values associated with transitions of a plurality of signals of the circuit based on the simulation information; aggregate the energy consumption values associated with the transitions of the plurality of signals for each time point of a plurality of time points based on when each of the transitions of the plurality of signals occurs; and identify a possible Differential Power Analysis (DPA) leak at one of the plurality of time points based on a difference of the aggregated energy consumption values. 9 . The system of claim 8 , wherein the identifying of the possible DPA leak is further based on the difference of the aggregated energy consumption values at the one of the plurality of time points exceeding a threshold value of difference of energy consumption. 10 . The system of claim 8 , wherein the processing device is further to: provide an energy waveform corresponding to the difference of the aggregated energy consumption values at each of the plurality of time points, wherein the difference of the aggregated energy consumption values at each of the time points identifies the difference of the energy consumption of the circuit at each corresponding time point of the plurality of time points. 11 . The system of claim 8 , wherein the calculating of the energy consumption values associated with the transitions of the plurality of signals of the circuit is further based on energy consumption of a cell associated with the circuit. 12 . The system of claim 11 , wherein the energy consumption of the cell is based on a switching energy and an internal energy associated with the cell and is not based on a leakage energy associated with the cell. 13 . The system of claim 8 , wherein the simulation information comprises a first group of simulation information associated with a bit at a first value and a second group of simulation information associated with the same bit at a second value that is different than the first value. 14 . The system of claim 13 , wherein the processing device is further to: identify the aggregated energy consumption value of a time point of the plurality of time points associated with the first group of simulation information; and identify the aggregated energy consumption value of a corresponding time point associated with the second group of simulation information, wherein the identifying of the possible DPA leak at one of the plurality of time points based on the difference of the aggregated energy consumption values of the time point is further based on the time point associated with the first group of simulation information and the corresponding time point associated with the second group of simulation information. 15 . A non-transitory computer readable medium including data that, when accessed by a processing device, cause the processing device to perform operations comprising: receiving a first group of simulation information and a second group of simulation information of a circuit design; calculating energy consumption values associated with transitions of a plurality of signals for the first and second groups of simulation information; aggregating the energy consumption values associated with a time point based on transitions of the plurality of signals of the circuit design that occur at the time point for the first and second groups of simulation information; and identifying a possible Differential Power Analysis (DPA) leak at the time point if a difference in the aggregated energy consumption at the time point between the first and second groups of simulation information exceeds a threshold value. 16 . The non-transitory computer readable medium of claim 15 , wherein the calculating of the energy consumption values is further based on energy consumption of a cell used in the circuit design. 17 . The non-transitory computer readable medium of claim 16 , wherein the energy consumption of the cell is based on a switching energy and an internal energy associated with the cell in response to the transitions of the plurality of signals and is not based on a leakage energy associated with the cell. 18 . The non-transitory computer readable medium of claim 15 , wherein the simulation information comprises the first group of simulation information is associated with a bit at a first value and the second group
Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods · CPC title
Design verification, e.g. functional simulation or model checking · CPC title
Computer-aided design [CAD] · CPC title
Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant (by measuring phase angle only G01R25/00) · CPC title
for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA] · CPC title
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