Class d power driver peripheral

US2016134239A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016134239-A1
Application numberUS-201414536916-A
CountryUS
Kind codeA1
Filing dateNov 10, 2014
Priority dateNov 10, 2014
Publication dateMay 12, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A Class D peripheral is integrated with a microcontroller as a general purpose driver for providing many different Class D power applications such as motor and solenoid control, audio amplification, etc. Use of a simple triangle waveform (saw tooth) oscillator normally used for detecting changes in capacitance values in combination with a voltage comparator provides inexpensive generation of pulse width modulation (PWM) suitable for a wide range of Class D power applications. Selection of either an external audio input or an internal processor controlled analog reference provides for flexible adaptability to any Class D power driver requirement.

First claim

Opening claim text (preview).

What is claimed is: 1 . A class D power driver peripheral, comprising: a voltage comparator having a first input coupled to an analog voltage; a capacitive sensing module (CSM) having an output coupled to a second input of the voltage comparator and in input coupled to an external capacitor, wherein the CSM provides a triangle waveform output to the voltage comparator and the external capacitor determines a frequency of the triangle waveform; and a complementary output generator (COG) having an input coupled to an output of the voltage comparator and a plurality of outputs controlled by the output of the voltage comparator. 2 . The class D power driver peripheral according to claim 1 , wherein the analog voltage is provided by a digital-to-analog converter (DAC). 3 . The class D power driver peripheral according to claim 1 , wherein the analog voltage is provided by an external audio signal. 4 . The class D power driver peripheral according to claim 1 , further comprising: a differential amplifier having first and second inputs adapted for coupling to a load driven by the COG; an operational amplifier having a first input coupled to an output of the differential amplifier and a second input coupled to the analog voltage, wherein an output of the operational amplifier is coupled to the first input of the voltage comparator instead of the analog voltage; and a closed loop compensation circuit coupled with the operational amplifier. 5 . The class D power driver peripheral according to claim 1 , wherein the voltage comparator, the CSM and the COG are provided in an integrated circuit microcontroller. 6 . The class D power driver peripheral according to claim 2 , wherein the voltage comparator, the CSM, the DAC and the COG are provided in an integrated circuit microcontroller, and the DAC is coupled to and controlled by a digital processor of the microcontroller. 7 . The class D power driver peripheral according to claim 3 , wherein the voltage comparator, the CSM, the COG, the differential amplifier, the operational amplifier and the closed loop compensation circuit are provided in an integrated circuit microcontroller. 8 . The class D power driver peripheral according to claim 1 , wherein the CSM comprises: first and second CSM comparators; an RS-latch, wherein the set input of the RF-latch is coupled to an output of the first CSM comparator and the reset input is coupled to the second CSM comparator; and a feedback resistor coupled between a Q-not output of the RS-latch and the external capacitor. 9 . The class D power driver peripheral according to claim 1 , wherein the CSM comprises: a comparator with hysteresis; and first and second current sources coupled to an input of the comparator with hysteresis and the external capacitor, wherein an output of the comparator with hysteresis controls operation of the first and second current sources for charging and discharging the external capacitor. 10 . An integrated circuit microcontroller having a class D power driver peripheral, comprising: a digital processor and memory; a digital-to-analog converter (DAC) having inputs coupled to the digital processor; a voltage comparator having a first input coupled to an output of the DAC; a capacitive sensing module (CSM) having an output coupled to a second input of the voltage comparator and in input coupled to an external capacitor, wherein the CSM provides a triangle waveform output to the voltage comparator and the external capacitor determines a frequency of the triangle waveform; and a complementary output generator (COG) having an input coupled to an output of the voltage comparator and a plurality of outputs controlled by the output of the voltage comparator. 11 . The integrated circuit microcontroller according to claim 10 , further comprising: a differential amplifier having first and second inputs adapted for coupling to a load driven by the COG; an operational amplifier having a first input coupled to an output of the differential amplifier and a second input coupled to the analog voltage, wherein an output of the operational amplifier is coupled to the first input of the voltage comparator instead of the analog voltage; and a closed loop compensation circuit coupled with the operational amplifier. 12 . The integrated circuit microcontroller according to claim 10 , further comprising a switch coupled between the output of the DAC and the first input of the voltage comparator, and also coupled to an external analog input, wherein the switch is controlled by the digital processor and is adapted to couple either the output of the DAC or the external analog input to the first input of the voltage comparator. 13 . The integrated circuit microcontroller according to claim 10 , wherein the CSM comprises: first and second CSM comparators; an RS-latch, wherein the set input of the RF-latch is coupled to an output of the first CSM comparator and the reset input is coupled to the second CSM comparator; and a feedback resistor coupled between a Q-not output of the RS-latch and the external capacitor. 14 . The integrated circuit microcontroller according to claim 10 , wherein the CSM comprises: a comparator with hysteresis; and first and second current sources coupled to an input of the comparator with hysteresis and the external capacitor, wherein an output of the comparator with hysteresis controls operation of the first and second current sources for charging and discharging the external capacitor. 15 . A system comprising the class D power driver according to claim 1 , and further comprising: a plurality of power metal oxide semiconductor field effect transistors (MOSFETs) each having a gate control coupled to a respective one of the COG outputs, wherein the plurality of power MOSFETs are configured in an H-bridge; and a load coupled to and power by the H-bridge configured power MOSFETs. 16 . The system according to claim 15 , wherein the load comprises an audio speaker. 17 . The system according to claim 15 , wherein the load is selected from the group consisting of a motor, a transducer, a solenoid actuator, and a piezo electric actuator. 18 . The system according to claim 15 , wherein the COG has dead band control to prevent current shoot through of the H-bridge configured power MOSFETs. 19 . The system according to claim 15 , further comprising: a differential amplifier having first and second inputs coupled to the load; an operational amplifier having a first input coupled to an output of the differential amplifier and a second input coupled to the analog voltage, wherein an output of the operational amplifier is coupled to the first input of the voltage comparator instead of the analog voltage; and a closed loop compensation circuit coupled with the operational amplifier. 20 . A system comprising the class D power driver according to claim 2 , and further comprising: a plurality of power metal oxide semiconductor field effect transistors (MOSFETs) each having a gate control coupled to a respective one of the COG outputs, wherein the plurality of power MOSFETs are configured in an H-bridge; and a load coupled to and power by the H-bridge configured power MOSFETs. 21 . The system according to claim 20 , further comprising: a differential amplifier having first and second inputs coupled to the load; an operational amplifier having a first input coupled to an output of the differential amplifier and a second input cou

Assignees

Inventors

Classifications

  • H03F3/2175Primary

    using analogue-digital or digital-analogue conversion (H03F3/2173 takes precedence) · CPC title

  • H03F3/2171Primary

    with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title

  • of the bridge type · CPC title

  • with semiconductor devices only · CPC title

  • the amplifier being designed for audio applications · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016134239A1 cover?
A Class D peripheral is integrated with a microcontroller as a general purpose driver for providing many different Class D power applications such as motor and solenoid control, audio amplification, etc. Use of a simple triangle waveform (saw tooth) oscillator normally used for detecting changes in capacitance values in combination with a voltage comparator provides inexpensive generation of pu…
Who is the assignee on this patent?
Microchip Tech Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/2175. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).