Digital sensor system

Patent metadata

Field	Value
Publication number	US-2016132091-A1
Application number	US-201514926602-A
Country	US
Kind code	A1
Filing date	Oct 29, 2015
Priority date	Nov 6, 2014
Publication date	May 12, 2016
Grant date	—

Abstract

A digital sensor system includes a sensor element, an analog-to-digital converter coupled to the sensor element, and a wake-up circuit configured to activate the sensor element and the analog-to-digital converter in response to a predefined event.

First claim

1 . A digital sensor system, comprising:
a sensor element; an analog-to-digital converter coupled to the sensor element; and a wake-up circuit configured to activate the sensor element and the analog-to-digital converter in response to a predefined event.

2 . The digital sensor system of claim 1 , wherein the predefined event comprises at least one event selected from: a predefined time, a lapse of a predefined time interval, a signal from a further sensor element having a predefined value, a reset signal, or a diagnosis signal.

3 . The digital sensor system of claim 1 , further comprising a digital signal processor coupled to the analog-to-digital converter.

4 . The digital sensor system of claim 3 , wherein the digital sensor system is configured to activate the digital signal processor in case a digital signal generated by the analog-to-digital converter fulfils a predefined criterion, based on activation of the sensor element and the analog-to-digital converter, or based on the predefined event.

5 . The digital sensor system of claim 4 , wherein the predefined criterion is set upon manufacturing or initializing the digital sensor system, and wherein, during operation, the predefined criterion is fixed or is variable based on a setting signal.

6 . The digital sensor system of claim 4 , wherein the digital signal processor is configured to modify the predefined criterion to obtain a new predefined criterion based on the digital signal generated by the analog-to-digital converter, and to replace the predefined criterion by the new predefined criterion.

7 . The digital sensor system of claim 6 , wherein the digital signal processor is configured to:
determine whether the digital signal generated by the analog-to-digital converter is within a predefined range, determine an existence of a potential disturbance or failure when the digital signal generated by the analog-to-digital converter is outside the predefined range, and cause a change of the predefined event and/or the predefined criterion so that the wake-up circuit activates the sensor element and the analog-to-digital converter more frequently, or so that the sensor element and the analog-to-digital converter are continuously operated for a predefined period of time.

8 . The digital sensor system of claim 4 , further comprising a memory coupled to the analog-to-digital converter, wherein the memory is configured to store the predefined criterion.

9 . The digital sensor system of claim 3 , wherein the digital signal processor is configured to be in a sleep mode when not being activated.

10 . The digital sensor system of claim 9 , wherein the digital signal processor is configured to provide, while being in the sleep mode, to the wake-up circuit a signal indicative of the predefined event, and to remain in or return to the sleep mode until activation.

11 . The digital sensor system of claim 3 , wherein the digital signal processor comprises a digital comparator coupled to the analog-to-digital converter and a signal processing circuit coupled to the digital comparator.

12 . The digital sensor system of claim 1 , further comprising a first oscillator configured to generate a first clock signal which comprises at least the predefined event.

13 . The digital sensor system of claim 12 , further comprising a second oscillator configured to be activated by the first clock signal and to generate a second clock signal having a higher clock frequency than the first clock signal for operating the analog-to-digital converter, wherein the second oscillator is configured to be deactivated when processing of a sensor signal from the sensor element by the analog-to-digital converter is completed.

14 . The digital sensor system of claim 12 , wherein a digital signal processor is configured to be activated by the first clock signal and to generate a second clock signal having a higher clock frequency than the first clock signal for operating the analog-to-digital converter.

15 . The digital sensor system of claim 1 , wherein at least the sensor element, the analog-to-digital converter, and the wake-up circuit are formed as an integrated circuit chip, the integrated circuit chip comprising a circuit board on or in which the sensor element, the analog-to-digital converter, and the wake-up circuit are formed, and one or more external contacts coupled to the sensor element, the analog-to-digital converter, and the wake-up circuit.

16 . The digital sensor system of claim 15 , wherein the integrated circuit chip further comprises at least a part of a digital signal processor.

17 . The digital sensor system of claim 15 , wherein the integrated circuit chip further comprises an interface for coupling with an external digital signal processor.

18 . The digital sensor system of claim 1 , further comprising a controller, wherein the controller is configured to cause the wake-up circuit to be activated or deactivated, wherein the digital sensor system is configured to operate continuously or intermittently, based on an external trigger signal, when the wake-up circuit is deactivated.

19 . The digital sensor system of claim 1 , wherein the sensor element comprises one or more magnetic sensors, the one or more magnetic sensors including at least one of a xMR sensor, a Hall sensor or a Spinning-Current-Hall-Sensor, or a sensor measuring physical quantities like voltages, temperatures, or currents for trimming or diagnosis purposes.

20 . The digital sensor system of claim 1 , wherein the wake-up circuit is configured to output a wake-up signal.

21 . The digital sensor system of claim 20 , wherein the wake-up signal comprises a pulse or a pulse code.

Assignees

• Infineon Technologies Ag

Inventors

• Bodner Christof
• Kranz Theodor
• Motz Mario
• Scherr Wolfgang

Classifications

• G06F1/06

  Clock generators producing several clock signals {(G06F1/08 - G06F1/14 take precedence)} · CPC title

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• H03M1/54

  Input signal sampled and held with linear return to datum · CPC title

• G01D5/145

  influenced by the relative movement between the Hall device and magnetic fields (see G01R33/06) · CPC title

• G01D5/12 Primary

  using electric or magnetic means (G01D5/06 takes precedence) · CPC title