Miniaturized Computation and Storage Merged System

US2016132079A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016132079-A1
Application numberUS-201414899184-A
CountryUS
Kind codeA1
Filing dateMay 4, 2014
Priority dateJun 17, 2013
Publication dateMay 12, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a miniaturized computation and storage merged system, which relates to the fields of communications, information, industrial control and the like. The miniaturized computation and storage merged system includes: a mid-back board having a plurality of board card slots; a first processing board which is connected with the mid-back board; a second processing board which is connected with the mid-back board; and one or more rear-inserted board cards, each of which is fixed on the mid-back board via a board card slot, wherein the one or more rear-inserted board cards are configured to provide support in data storage and/or computation for the first processing board and the second processing board, to enable the first processing board and the second processing board to complete a data storage and/or computation task. The system has a very high expansibility and a very high popularity.

First claim

Opening claim text (preview).

What is claimed is: 1 . A miniaturized computation and storage merged system, comprising: a mid-back board having a plurality of board card slots; a first processing board which is connected with the mid-back board; a second processing board which is connected with the mid-back board; and one or more rear-inserted board cards, each of which is fixed on the mid-back board via a board card slot, wherein the one or more rear-inserted board cards are configured to provide support in data storage and/or computation for the first processing board and the second processing board, to enable the first processing board and the second processing board to complete a data storage and/or computation task. 2 . The miniaturized computation and storage merged system as claimed in claim 1 , wherein multiple common board card slots are provided on the mid-back board. 3 . The miniaturized computation and storage merged system as claimed in claim 2 , wherein both the first processing board and the second processing board are connected with the multiple common board card slots through Serial Attached Small Computer System Interface (SAS) buses; the one or more rear-inserted board cards comprise one or more SAS hard disk board cards, each of which is fixed on the mid-back board via a common board card slot and is respectively connected with the first processing board and the second processing board through the SAS buses. 4 . The miniaturized computation and storage merged system as claimed in claim 2 , wherein both the first processing board and the second processing board are connected with the multiple common board card slots through Peripheral Component Interface Express (PCIe) buses; each of the one or more rear-inserted board cards is fixed on the mid-back board via a common board card slot, and is respectively connected with the first processing board and the second processing board through the PCIe buses. 5 . The miniaturized computation and storage merged system as claimed in claim 1 , wherein the first processing board is connected with the second processing board through a heartbeat line, the first processing board is able to take over, when detecting through the heartbeat line that the second processing board has a fault, each rear-inserted board card which is fixed on a common board card slot and originally controlled by the second processing board, or the second processing board is able to take over, when detecting through the heartbeat line that the first processing board has a fault, each rear-inserted board card which is fixed on a common board card slot and originally controlled by the first processing board. 6 . The miniaturized computation and storage merged system as claimed in claim 4 , wherein the one or more rear-inserted board cards further comprise one or more interface board cards, each of which is fixed on the mid-back board via a common board card slot and acts as an external multi-functional interface for the first processing board and the second processing board, the multi-functional interface comprising: Time Division Multiplexing (TDM) interface, Internet Protocol (IP) interface, data collection and conversion interface. 7 . The miniaturized computation and storage merged system as claimed in claim 4 , wherein the one or more rear-inserted board cards further comprise one or more function board cards, each of which is fixed on the mid-back board via a common board card slot and is configured to provide a co-processing function for the first processing board and the second processing board, the co-processing function comprising: Deep Packet Inspection (DPI), Digital Signal Processing (DSP), and Internet Protocol Security (IPSec). 8 . The miniaturized computation and storage merged system as claimed in claim 1 , wherein a first independent board card slot and a second independent board card slot are provided on the mid-back board, wherein the first processing board is connected with the first independent board card slot and the second processing board is connected with the second independent board card slot; the one or more rear-inserted board cards further comprise: a first independent board card fixed on the mid-back board via the first independent board card slot and configured to provide an external interface or concatenation for the first processing board; a second independent board card fixed on the mid-back board via the second independent board card slot and configured to provide an external interface or concatenation for the second processing board. 9 . The miniaturized computation and storage merged system as claimed in claim 1 , wherein two power supply board card slots are provided on the mid-back board; the one or more rear-inserted board cards further comprise: two power supply input board cards fixed on the mid-back board via the two power supply board card slots; the miniaturized computation and storage merged system further comprises: two power supply fan boards, which are connected with the two power supply board card slots respectively, and are configured to supply power to as well as ventilate and cool the miniaturized computation and storage merged system in a parallel working mode; the two power supply input board cards are configured to guide input power supply to the two power supply fan boards through respective corresponding power supply board card slots; both the two power supply fan boards comprise a power supply adaptation circuit, which is configured to transform a voltage of the power supply input to the power supply fan board and to supply the transformed output power supply to each component of the miniaturized computation and storage merged system. 10 . The miniaturized computation and storage merged system as claimed in claim 9 , further comprising: a case provided with a first type of slots and a second type of slots, wherein the mid-back board is placed in a middle position of the case; the first processing board, the second processing board and the two power supply fan boards are placed in a front half part of the case via the first type of slots; the one or more rear-inserted board cards are placed in a rear half part of the case via the second type of slots and are fixed on the mid-back board via one or more board card slots.

Assignees

Inventors

Classifications

  • Cooling means · CPC title

  • G06F1/184Primary

    Mounting of motherboards · CPC title

  • Power distribution · CPC title

  • H05K7/1445Primary

    with double-sided connections · CPC title

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Frequently asked questions

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What does patent US2016132079A1 cover?
Provided is a miniaturized computation and storage merged system, which relates to the fields of communications, information, industrial control and the like. The miniaturized computation and storage merged system includes: a mid-back board having a plurality of board card slots; a first processing board which is connected with the mid-back board; a second processing board which is connected wi…
Who is the assignee on this patent?
Zte Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/184. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).