Circuit and method for compensating for early effects

Patent metadata

Field	Value
Publication number	US-2016126935-A1
Application number	US-201414531541-A
Country	US
Kind code	A1
Filing date	Nov 3, 2014
Priority date	Nov 3, 2014
Publication date	May 5, 2016
Grant date	—

Abstract

Early effects are intrinsically present in bipolar junction transistors (BJTs). Described are examples of complimentary to absolute temperature (CTAT) and proportional to absolute temperature (PTAT) cells that reduce errors associated with the Early effects that would otherwise be present.

First claim

1 . A complimentary to absolute temperature, CTAT, cell, the cell comprising:
a first bipolar transistor having a collector, base and emitter, a CTAT voltage generator coupled to the collector of the first bipolar transistor to bias the collector with a CTAT voltage and compensate the first bipolar transistor for the Early effect.

2 . The CTAT cell of claim 1 wherein the CTAT voltage generator comprises a second bipolar transistor of the cell, the second bipolar transistor coupled to the collector of the first bipolar transistor such that collector of the first bipolar transistor is biased with a voltage related to the base emitter voltage of the second bipolar transistor.

3 . The CTAT cell of claim 2 comprising a current mirror, the current mirror mirroring a current generated by the second bipolar transistor across a resistor provided at the collector of the first bipolar transistor to bias the collector of the first bipolar transistor with the voltage related to the base emitter voltage of the second bipolar transistor.

4 . The CTAT cell of claim 3 comprising a first amplifier and a second amplifier, an input of the second amplifier being coupled to the second bipolar transistor and an input and an output of the first amplifier being coupled to the first bipolar transistor.

5 . The CTAT cell of claim 4 wherein the second amplifier and current mirror are configured to reflect a base emitter voltage of the second bipolar transistor across a first resistor, r 1 , the output of the first amplifier being coupled via a second resistor, r 2 , to the base of the first bipolar transistor and wherein the values of the first and second resistors are scaled relative to one another provide a relationship between the forward and revert Early effect in accordance with:

r
2

r
1

=

V
AF

V
AR

Where:
V AF is the direct Early effect voltage of the second bipolar transistor; and
V BF is the reverse Early effect voltage of the second bipolar transistor;
such that the Early effects of the base-emitter voltage of the first bipolar transistor are completely eliminated.

6 . The circuit of claim 5 wherein the collector-base junction of the second bipolar transistor is biased such that the direct Early effect associated with the second bipolar transistor qn 2 is used to compensate for the reverse Early effect of the same transistor.

7 . A proportional to absolute temperature, PTAT, cell, the cell comprising:
a first bipolar transistor and a second bipolar transistor, the first bipolar transistor configured to operate with a higher collector current density than the second bipolar transistor, each of the first bipolar transistor and the second bipolar transistor having a base, collector and emitter; a first bias current source coupled to the collector of each of the first bipolar transistor and the second bipolar transistor; a second bias current source providing a current having a form which is proportional to absolute temperature and coupled to a first resistor to generate a proportional to absolute temperature voltage drop across the first resistor, the voltage drop across the transistor operably being translated as a collector-base voltage of the first bipolar transistor; wherein the second bipolar transistor is diode connected so as to be unaffected by the direct Early effect and the first bipolar transistor has contributions from each of the direct Early effect and the reverse Early effect, the first and second bipolar transistors being coupled to one another to operably generate a base emitter voltage difference which is unaffected by the Early effects.

8 . The PTAT cell of claim 7 comprising:
a first amplifier and a second amplifier, an input of the first amplifier being coupled to the first bipolar transistor and an input and an output of the second amplifier being coupled to the second bipolar transistor;
a current mirror configured to provide the first bias current to collectors of each of the first bipolar transistor and the second bipolar transistor; and
wherein the first bipolar transistor is configured to have a collector base voltage having a form which is proportional to absolute temperature, PTAT, and the second bipolar transistor is configured to operate with a zero-collector base voltage.

9 . The PTAT cell of claim 8 wherein:
a non-inverting node of the first amplifier is coupled to the collector of the first bipolar transistor and the output of the first amplifier is coupled via the first resistor to the base of the first bipolar transistor; and
a non-inverting node of the second amplifier is coupled to the second bipolar transistor.

10 . The PTAT cell of claim 9 wherein:
the first amplifier is provided with its input nodes at the same potential such that the PTAT voltage drop across the first resistor is translated as a collector-base voltage of the first bipolar transistor.

11 . The PTAT cell of claim 8 wherein the second amplifier is coupled to the second bipolar transistor and operably biases the second bipolar transistor to operate with zero collector-base voltage.

12 . The PTAT cell of claim 7 configured such that a voltage difference between the base of the first bipolar transistor and the base of the second bipolar transistor is linear with absolute temperature, the collector base voltage of the first bipolar transistor being determined from the relationship:

V

CB



0

=

V
AF

V
AR

*
c

Where
V CBO is the collector base voltage of the first bipolar transistor;
V AF is the forward Early effect voltage of the second bipolar transistor;
V AR is the reverse Early effect voltage of the second bipolar transistor; and
c corresponds to the base-emitter voltage difference of the second bipolar transistor at temperature T 0 .

13 . A voltage reference circuit comprising a complimentary to absolute temperature, CTAT, cell and a proportional to absolute temperature, PTAT, cell, the circuit being configured to combine an output from the CTAT cell with an output from the PTAT cell to generate a voltage reference which is first order insensitive to temperature variations, and wherein:
the CTAT cell comprises a first bipolar transistor having a collector, base and emitter, a CTAT voltage generator coupled to the collector of the first bipolar transistor to bias the collector with a CTAT voltage and compensate the first bipolar transistor for the Early effect; and
the PTAT cell comprises:
a third bipolar transistor and a fourth bipolar transistor, the third bipolar transistor configured to operate with a

Assignees

• Marinca Stefan
• Analog Devices Global

Inventors

• Marinca Stefan

Classifications

• G05F3/30 Primary

  Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title

• G06F30/36 Primary

  Circuit design at the analogue level · CPC title

• H03K3/26

  by the use, as active elements, of bipolar transistors with internal or external positive feedback (H03K3/023, H03K3/027 take precedence) · CPC title

• H03K3/011 Primary

  Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title