Multilayer ceramic capacitor and method of manufacturing the same

US2016126012A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016126012-A1
Application numberUS-201514859176-A
CountryUS
Kind codeA1
Filing dateSep 18, 2015
Priority dateNov 5, 2014
Publication dateMay 5, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A method of manufacturing a multilayer ceramic capacitor includes stacking dielectric sheets on which internal electrode patterns are printed, to form a multilayer body, forming additional dielectric sheets on portions of opposite side surfaces of the multilayer body, and sintering the multilayer body to form a ceramic body in which internal electrodes are disposed. Here, the additional dielectric sheets form attachment parts on the opposite side surfaces of the ceramic body by the sintering of the multilayer body.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of manufacturing a multilayer ceramic capacitor, the method comprising: stacking dielectric sheets on which internal electrode patterns are printed, to form a multilayer body; forming additional dielectric sheets on portions of first and second side surfaces, opposite to each other, of the multilayer body; and sintering the multilayer body to form a ceramic body in which internal electrodes are disposed, wherein the additionally formed dielectric sheets form attachment parts on opposite side surfaces of the ceramic body by the sintering of the multilayer body. 2 . The method of claim 1 , further comprising providing an organic material on regions of the first and second side surfaces of the multilayer body on which the additional dielectric sheets are not formed. 3 . The method of claim 2 , wherein the organic material is removed by the sintering of the multilayer body. 4 . The method of claim 1 , wherein T/W satisfies T/W>1.0, in which W is a width of the ceramic body and T is a thickness of the ceramic body. 5 . The method of claim 1 , wherein the attachment parts have a height less than a thickness of the ceramic body in a thickness direction of the ceramic body. 6 . The method of claim 1 , wherein Ta/T satisfies 0 . 05 ≦Ta/T≦ 0 . 97 , in which T is a thickness of the ceramic body and Ta is a height of the attachment part. 7 . The method of claim 1 , wherein W/Wb satisfies 0.90≦W/Wb≦0.97, in which W is a width of the ceramic body and Wb is a sum of widths of the ceramic body and the attachment parts. 8 . The method of claim 1 , wherein the internal electrodes and the attachment parts are stacked in a width direction of the ceramic body. 9 . A multilayer ceramic capacitor comprising: a ceramic body including dielectric layers and satisfying T/W>1.0, in which W is a width of the ceramic body and T is a thickness of the ceramic body; internal electrodes disposed in the ceramic body; and attachment parts disposed on opposite side surfaces of the ceramic body in a width direction of the ceramic body and having a height Ta smaller than the thickness T of the ceramic body, wherein the attachment parts are made of a dielectric material. 10 . The multilayer ceramic capacitor of claim 9 , wherein Ta/T satisfies 0.05≦Ta/T≦0.97. 11 . The multilayer ceramic capacitor of claim 9 , wherein W/Wb satisfies 0.90≦W/Wb≦0.97, in which Wb is a sum of widths of the ceramic body and the attachment parts. 12 . The multilayer ceramic capacitor of claim 9 , wherein the attachment parts is disposed only on a portion of each of the opposite side surfaces. 13 . The multilayer ceramic capacitor of claim 9 , wherein the attachment parts are formed of substantially the same materials as a material of the dielectric layers forming the ceramic body. 14 . The multilayer ceramic capacitor of claim 9 , wherein td satisfies 0.1 μm≦td≦0.8 μm, in which td is an average thickness of the dielectric layers. 15 . The multilayer ceramic capacitor of claim 9 , wherein a thickness of the internal electrode is 0.6 μm or less. 16 . A method of manufacturing a multilayer ceramic capacitor, the method comprising: alternatively stacking a plurality of dielectric sheets and a plurality of internal electrode patterns, so as to form a multilayer body; forming additional dielectric sheets on a portion of each of opposite side surfaces of the multilayer body in a stacking direction of the plurality of dielectric sheets and the plurality of internal electrode patterns; forming organic layers on the remaining portions of the opposite surfaces where the additional dielectric sheets are not formed; and sintering the multilayer body, the additional dielectric sheets, and the organic layers, wherein the organic layers are removed by sintering. 17 . The method of claim 16 , further comprising: performing, in a first cut direction, a first cut of the multilayer body and the additional dielectric sheets along an edge of the additional dielectric sheets, or along a path which crosses the additional dielectric sheets and passes no internal electrode patterns; and performing a second cut of the multilayer body and the additional dielectric sheets in a second cut direction perpendicular to the first cut direction, wherein: a plurality of multilayer bodies are formed by the first cut and the second cut, and attachment parts, formed of the additional dielectric sheets, are attached to opposite side surfaces of each multilayer body. 18 . The method of claim 17 , wherein T/W satisfies T/W>1.0, in which W is a width of one of the multilayer bodies determined in the stacking direction and T is a thickness of the one of the multilayer ceramic bodies determined in the second cut direction. 19 . The method of claim 17 , wherein Ta/T satisfies 0.05≦Ta/T≦0.97, in which T is a thickness of the ceramic body determined in the second cut direction and Ta is a height of the attachment part determined in the second cut direction. 20 . The method of claim 17 , wherein W/Wb satisfies 0.90≦W/Wb≦0.97, in which W is a width of the ceramic body determined in the stacking direction and Wb is a sum of widths of the ceramic body and the attachment parts determined in the stacking direction.

Assignees

Inventors

Classifications

  • Form of non-self-supporting electrodes · CPC title

  • H01G4/12Primary

    Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • H01G4/1209Primary

    characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

  • for surface mounting, e.g. chip capacitors · CPC title

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What does patent US2016126012A1 cover?
A method of manufacturing a multilayer ceramic capacitor includes stacking dielectric sheets on which internal electrode patterns are printed, to form a multilayer body, forming additional dielectric sheets on portions of opposite side surfaces of the multilayer body, and sintering the multilayer body to form a ceramic body in which internal electrodes are disposed. Here, the additional dielect…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).