Input device and display device
US-2015116266-A1 · Apr 30, 2015 · US
US2016124491A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016124491-A1 |
| Application number | US-201514831065-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 20, 2015 |
| Priority date | Oct 29, 2014 |
| Publication date | May 5, 2016 |
| Grant date | — |
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A display apparatus includes a display panel and a power supply. The display panel displays an image at a first driving frequency in a normal mode and displays an image at a second driving frequency in a low power mode. The second driving frequency is lower than the first driving frequency. The power supply outputs a first initialization voltage at a first level to the display panel during an active period of the low power mode. The power supply outputs a second initialization voltage at a second level to the display panel during at least a portion of a blank period of the low power mode. The second level is higher than the first level.
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What is claimed is: 1 . A display apparatus, comprising: a display panel to display an image at a first driving frequency in a normal mode and to display an image at a second driving frequency lower than the first driving frequency in a low power mode; and a power supply to output a first initialization voltage at a first level to the display panel during an active period of the low power mode and to output a second initialization voltage at a second level to the display panel during at least a portion of a blank period of the low power mode, wherein the second level is higher than the first level. 2 . The apparatus as claimed in claim 1 , wherein the power supply is to: output the first initialization voltage during a first period of the blank period of the low power mode, and output the second initialization voltage during a second period that is subsequent to the first period of the blank period. 3 . The apparatus as claimed in claim 2 , wherein a length of the first period is substantially equal to a length of a blank period of the normal mode. 4 . The apparatus as claimed in claim 1 , wherein the display panel includes a plurality of pixels, each of the pixels including: an organic light-emitting diode; a second transistor including a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to a first node; a capacitor connected between a first power voltage line and a second node; a first transistor including a gate electrode connected to the second node, a first electrode connected to the first node, and a second electrode connected to a third node; a third transistor including a gate electrode connected to the first scan line, a first electrode connected to the third node, and a second electrode connected to the second node; a fourth transistor including a gate electrode connected to a second scan line, a first electrode connected to an initialization voltage line, and a second electrode connected to the second node; a fifth transistor including a gate electrode connected to an emission control line, a first electrode connected to the first power voltage line, and a second electrode connected to the first node; and a sixth transistor including a gate electrode connected to the emission control line, a first electrode connected to the third node, and a second electrode connected to an anode of the organic light-emitting diode. 5 . The apparatus as claimed in claim 4 , wherein the second initialization voltage is a value that is approximately equal to a voltage of the gate electrode of the first transistor or a value that is approximately equal to an average of voltages of gate electrodes of a plurality of first transistors. 6 . The apparatus as claimed in claim 4 , wherein: during a first portion of the blank period of the low power mode, the fifth transistor and the sixth transistor are turned on, the first to fourth transistors are turned off, and the second initialization voltage is applied to the initialization voltage line; and during a second portion of the blank period of the low power mode, the fifth transistor and the sixth transistor are turned on, the first to fourth transistors are turned off, and the first initialization voltage is applied to the initialization voltage line. 7 . The apparatus as claimed in claim 4 , wherein each of the pixels includes: a seventh transistor connected between the initialization voltage line and the anode of the organic light-emitting diode, and the seventh transistor is to turn on based on a second scan signal to initialize the anode of the organic light-emitting diode. 8 . The apparatus as claimed in claim 4 , wherein each of the pixels includes: an auxiliary capacitor connected between the second node and the initialization voltage line. 9 . The apparatus as claimed in claim 8 , wherein the power supply is to: output the first initialization voltage during a first period of the blank period of the low power mode, and increasingly output the second initialization voltage from the first level to the second level during a second period subsequent to the first period of the blank period. 10 . The apparatus as claimed in claim 8 , wherein each of the pixels includes: a seventh transistor connected between the initialization voltage line and the anode of the organic light-emitting diode, and the seventh to turn on based on a second scan signal to initialize the anode of the organic light-emitting diode. 11 . A method of driving a display apparatus, the method comprising: outputting a first initialization voltage at a first level to a display panel during an active period of a low power mode; and outputting a second initialization voltage at a second level the display panel during at least a portion of a blank period of the low power mode, wherein the second level is higher than the first level and wherein the display panel operates at a first driving frequency in normal mode and a second driving frequency in the low power mode, the second driving frequency lower than the first driving frequency. 12 . The method as claimed in claim 11 , wherein outputting the second initialization voltage includes: outputting the first initialization voltage during a first period of the blank period of the low power mode, and outputting the second initialization voltage during a second period that is subsequent to the first period of the blank period. 13 . The method as claimed in claim 12 , wherein a length of the first period is substantially equal to a length of a blank period of the normal mode. 14 . The method as claimed in claim 11 , wherein the display panel includes a plurality of pixels, each of the pixels including: an organic light-emitting diode; a second transistor including a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to a first node; a capacitor connected between a first power voltage line and a second node; a first transistor including a gate electrode connected to the second node, a first electrode connected to the first node, and a second electrode connected to a third node; a third transistor including a gate electrode connected to the first scan line, a first electrode connected to the third node, and a second electrode connected to the second node; a fourth transistor including a gate electrode connected to a second scan line, a first electrode connected to an initialization voltage line, and a second electrode connected to the second node; a fifth transistor including a gate electrode connected to an emission control line, a first electrode connected to the first power voltage line, and a second electrode connected to the first node; and a sixth transistor including a gate electrode connected to the emission control line, a first electrode connected to the third node, and a second electrode connected to an anode of the organic light-emitting diode. 15 . The method as claimed in claim 14 , wherein: the second initialization voltage is a value that is approximately equal to a voltage of the gate electrode of the first transistor, or a value that is approximately equal to an average of voltages of gate electrodes of a plurality of first transistors. 16 . The method as claimed in claim 14 , wherein: during a first portion of the blank period of the low power mode, the method includes turning on the fifth transistor and the sixth transistor, turning off the first to fourth transistors, and applying the second initializatio
with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title
Power saving in display device · CPC title
with pixel circuitry controlling the current through the light-emitting element · CPC title
Change or adaptation of the frame rate of the video stream · CPC title
Power management, e.g. power saving · CPC title
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