Programmable switched capacitor block

Patent metadata

Field	Value
Publication number	US-2016118973-A1
Application number	US-201514865999-A
Country	US
Kind code	A1
Filing date	Sep 25, 2015
Priority date	May 30, 2014
Publication date	Apr 28, 2016
Grant date	—

Abstract

A first portion of a programmable switched capacitor block includes a first plurality of switched capacitors and a second portion of the programmable switched capacitor block includes a second plurality of switched capacitors. A first switch associated with the first plurality of switched capacitors as well as a second switch associated with the second plurality of switched capacitors may be configured based on a type of analog function that is to be provided. The configuring of the first analog and the second analog block may include the configuring of the first switch associated with the first plurality of switched capacitors when the analog function operates on a first single ended signal and the configuring of both the first and second switches when the analog function operates on a differential signal

First claim

What is claimed is:

1 . An apparatus comprising:
a first portion of a programmable switched capacitor block comprising a first plurality of switched capacitors; and a second portion of the programmable switched capacitor block comprising a second plurality of switched capacitors, wherein a first switch associated with the first plurality of switched capacitors and a second switch associated with the second plurality of switched capacitors are configured based on a type of analog function that is to be provided by configuring the first switch associated with the first plurality of switched capacitors when the analog function operates on a single ended signal, and wherein both the first switch associated with the first plurality of switched capacitors and the second switch associated with the second plurality of switched capacitors are configured when the analog function operates on a differential signal.

2 . The apparatus of claim 1 , wherein the first portion and the second portion of the programmable switched capacitor block comprises a multi-level comparator.

3 . The apparatus of claim 2 , wherein the first switch and the second switch are further configured based on an output of the multi-level comparator.

4 . The apparatus of claim 1 , wherein the analog function corresponds to an oscillator function, and wherein the first portion and the second portion correspond to an integrator operation for the oscillator function.

5 . The apparatus of claim 1 , wherein the analog function corresponds to a median filter function, and wherein the first and second switches are configured based on the type of analog function is further based on an output of a multi-level comparator of at least one of the first portion or the second portion to modify an operation of the median filter function.

6 . The apparatus of claim 1 , wherein the type of analog function corresponds to a filter function and an analog to digital converter function, and wherein the first portion provides an operation associated with the filter function and the second portion provides an operation associated with the analog to digital converter function.

7 . The apparatus of claim 1 , further comprising a bus coupled to the first and second portions of the programmable switched capacitor block to provide an output of a component of the second portion to the first portion.

8 . A method comprising:
receiving a signal corresponding to a type of analog function that is to be provided by a programmable switched capacitor block; configuring a first portion of the programmable switched capacitor block to receive a first input signal and to transmit a first output signal by operating a first switch of the first portion based on the type of analog function that is to be provided, wherein the first switch of the first portion is associated with a first plurality of switched capacitors; and configuring a second portion of the programmable switched capacitor block to receive a second input signal and to transmit a second output signal by operating a second switch of the second portion based on the type of analog function that is to be provided, wherein the second switch of the second portion is associated with a second plurality of switched capacitors, wherein the first switch associated with the first plurality of switched capacitors is configured when the type of analog function operates on a single ended signal and both the first switch associated with the first plurality of switched capacitors and the second switch associated with the second plurality of switched capacitors are configured when the type of analog function operates on a differential signal.

9 . The method of claim 8 , further comprising:
receiving a plurality of reference voltages at a multi-level comparator of the first portion or the second portion of the programmable switched capacitor block, wherein the analog function corresponds to a delta-sigma digital to analog converter function that is based on an output of the multi-level comparator.

10 . The method of claim 8 , wherein the analog function corresponds to an oscillator function, and wherein the first portion and the second portion correspond to an integrator operation for the oscillator function.

11 . The method of claim 8 , wherein the configuring of the first and second switches is based on opening or closing of the first and second switches.

12 . The method of claim 8 , wherein the analog function corresponds to a median filter function, and wherein the configuring based on the type of analog function is further based on an output of a multi-level comparator of at least one of the first portion or the second portion to modify an operation of the median filter function.

13 . The method of claim 8 , further comprising providing an output of a component of the second portion to the first portion via a bus that is coupled to the first and second portions of the programmable switched capacitor block.

14 . The method of claim 8 , wherein the type of analog function corresponds to a filter function and an analog to digital converter function, and wherein the first portion provides an operation associated with the filter function and the second portion provides an operation associated with the analog to digital converter function.

15 . A system comprising:
a processing device to generate a programming signal that specifies a type of analog function that is to be provided by a programmable switched capacitor block; a first portion of the programmable switched capacitor block comprising a first plurality of switched capacitors; and a second portion of the programmable switched capacitor block comprising a second plurality of switched capacitors, wherein a first switch associated with the first plurality of switched capacitors and a second switch associated with the second plurality of switched capacitors are configured based on the type of analog function that is specified by the programming signal by configuring the first switch associated with the first plurality of switched capacitors when the analog function operates on a single ended signal and configuring both the first switch associated with the first plurality of switched capacitors and the second switch associated with the second plurality of switched capacitors when the analog function operates on a differential signal.

16 . The system of claim 15 , wherein the analog function corresponds to a filter function that is adaptively controlled.

17 . The system of claim 15 , wherein the first portion and the second portion each correspond to an analog modulator loop function and a quantizer function, and wherein an output of the quantizer function of the first portion is an input to the analog modular loop function of the second portion.

18 . The system of claim 17 , wherein the first portion and the second portion correspond to a multi-stage noise shaping architecture.

19 . The system of claim 15 , wherein the first portion corresponds to a type of sigma-delta modulator function and the second portion corresponds to a nyquist analog to digital converter function.

20 . The system of claim 15 , wherein the first portion corresponds to a programmable gain amplifier operation and the second portion corresponds to an analog to digital converter operation, and wherein the type of analog function corresponds to a zoom analog to digital converter function.

Assignees

• Cypress Semiconductor Corp

Inventors

• Thiagarajan Eashwar
• Kutz Harold
• Johal Jaskarn Singh
• Hancioglu Erhan
• Byrkett Bruce
• Klein Hans
• Hastings Mark
• Seguine Dennis
• Mar Monte
• Rohilla Gajender
• Castor-Perry Kendall
• Ozbek Onur

Classifications

• H03K17/00 Primary

  Electronic switching or gating, i.e. not by contact-making and –breaking (gated amplifiers H03F3/72; switching arrangements for exchange systems using static devices H04Q3/52) · CPC title

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03H19/004

  Switched capacitor networks · CPC title

• H03F2203/45512

  the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC · CPC title