Doherty power amplifier combiner with tunable impedance termination circuit
US-2016049910-A1 · Feb 18, 2016 · US
US2016118944A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016118944-A1 |
| Application number | US-201514921279-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 23, 2015 |
| Priority date | Oct 25, 2014 |
| Publication date | Apr 28, 2016 |
| Grant date | — |
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Doherty power amplifier with tunable input network. An input network for a Doherty power amplifier can include a splitter circuit configured to receive a radio-frequency (RF) signal and split the RF signal into a first portion along a first path to a carrier amplifier of the Doherty power amplifier and a second portion along a second path to a peaking amplifier of the Doherty power amplifier. The input network can further include a tunable input circuit implemented along either or both of the first path and second path. The tunable input circuit can be configured to provide control of the amplitude and phase of either or both of the first portion and second portion.
Opening claim text (preview).
What is claimed is: 1 . An input network for a Doherty power amplifier, the input network comprising: a splitter circuit configured to receive a radio-frequency (RF) signal and split the RF signal into a first portion along a first path to a carrier amplifier of the Doherty power amplifier and a second portion along a second path to a peaking amplifier of the Doherty power amplifier; and a tunable input circuit implemented along either or both of the first path and second path, the tunable input circuit configured to provide control of the amplitude and phase of either or both of the first portion and second portion. 2 . The input network of claim 1 wherein the tunable input circuit includes an RC circuit. 3 . The input network of claim 2 wherein the RC circuit includes a first capacitor along the first path, a first resistor in a shunt configuration between the first capacitor and the carrier amplifier, a second resistor along the second path, and a second capacitor in a shunt configuration between the second resistor and the peaking amplifier. 4 . The input network of claim 3 wherein the first capacitor, first resistor, second capacitor, and second resistor are each tunable. 5 . The input network of claim 4 wherein the first capacitor and second capacitor each includes a switchable capacitor bank and the first resistor and second resistor each includes a switchable resistor bank. 6 . The input network of claim 1 wherein the tunable input circuit includes an RLC circuit. 7 . The input network of claim 6 wherein the RLC circuit includes a capacitor along the first path, a first resistor along the first path, an inductor along the second path, and a second resistor along the second path. 8 . The input network of claim 7 wherein the capacitor and the inductor are configured to provide control of the phase of either or both of the first portion and second portion and the first resistor and second resistor are configured to provide control of the amplitude of either or both of the first portion and second portion. 9 . The input network of claim 1 wherein the tunable input circuit includes a balun-based circuit. 10 . The input network of claim 9 wherein the balun-based circuit includes a balun having a first node configured to receive the input signal, a second node coupled to the carrier amplifier via a first resistor, a third node coupled to the peaking amplifier via a second resistor, and a forth node coupled to a ground potential via a termination impedance, the balun-based circuit further including a first capacitor coupled between the first node and the third node and a second capacitor coupled between the second node and the fourth node. 11 . The input network of claim 10 wherein the balun includes a first inductor coupled between the first node and the second node and a second inductor coupled between the third node and the fourth node. 12 . The input network of claim 1 further comprising a controller configured to tune the tunable input network. 13 . The input network of claim 12 wherein the controller is configured to tune the tunable input network based on a frequency of the RF signal. 14 . The input network of claim 12 wherein the controller is configured to tune the tunable input network such that the amplitude of the first portion and the amplitude of the second portion are unequal. 15 . The input network of claim 12 wherein the controller is configured to tune the tunable input network such that phase of the first portion and the phase of the second portion are non-orthogonal. 16 . The input network of claim 12 wherein the controller is configured to tune the tunable input network such that harmonics produced by the carrier amplifier and harmonics produced by the peaking amplifier are cancelled by a combiner. 17 . The input network of claim 12 wherein the controller is configured to perform wide-band linearization of the Doherty power amplifier. 18 . A Doherty power amplifier (PA) module comprising: a packaging substrate configured to receive a plurality of components; and a Doherty PA system implemented on the packaging substrate, the Doherty PA system including a splitter circuit configured to receive a radio-frequency (RF) signal and split the RF signal into a first portion along a first path and a second portion along a second path, a tunable input circuit implemented along either or both of the first path and second path, the tunable input circuit configured to provide control of the amplitude and phase of either or both of the first portion and second portion, a carrier amplifier configured to amplify the first portion and a peaking amplifier configured to amplify the second portion, and an output circuit configured to combine outputs of the carrier amplifier and the peaking amplifier to yield an amplified RF signal. 19 . The Doherty PA module of claim 18 wherein the output circuit includes a tunable impedance circuit. 20 . A wireless device comprising: a transceiver configured to generate a radio-frequency (RF) signal; a power amplifier (PA) module in communication with the transceiver, the PA module including a packaging substrate configured to receive a plurality of components and a PA system implemented on the packaging substrate, the PA system including a splitter circuit configured to receive a radio-frequency (RF) signal and split the RF signal into a first portion along a first path and a second portion along a second path, a tunable input circuit implemented along either or both of the first path and second path, the tunable input circuit configured to provide control of the amplitude and phase of either or both of the first portion and second portion, a carrier amplifier configured to amplify the first portion and a peaking amplifier configured to amplify the second portion, and an output circuit configured to combine outputs of the carrier amplifier and the peaking amplifier to yield an amplified RF signal; and an antenna in communication with the PA module, the antenna configured to facilitate transmission of the amplified RF signal.
with semiconductor devices only · CPC title
with semiconductor devices only · CPC title
An input signal being distributed in parallel over the inputs of a plurality of power amplifiers · CPC title
using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title
the gated amplifier being switched from a first band to a second band · CPC title
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