Non-isolated power supply output chassis ground fault detection and protection system

Patent metadata

Field	Value
Publication number	US-2016118784-A1
Application number	US-201414521688-A
Country	US
Kind code	A1
Filing date	Oct 23, 2014
Priority date	Oct 23, 2014
Publication date	Apr 28, 2016
Grant date	—

Abstract

A non-isolated power supply is configured to receive an input voltage and supply an output voltage, and includes a supply line, a return line, a first semiconductor switch coupled in series in the supply line, and a second semiconductor switch coupled in series in the return line. The first and second semiconductor switches are each configured to operate in an ON state and an OFF state. The differential current sensor is configured to sense differential current between the supply line and the return line. The fault detection logic is coupled to the differential current sensor, the first semiconductor switch, and the second semiconductor switch, and is configured to detect when the differential current exceeds a predetermined current magnitude, and command the first and second semiconductor switches to operate in the OFF state upon detecting that the differential current exceeds the predetermined current magnitude.

First claim

What is claimed is:

1 . A circuit, comprising:
a non-isolated power supply configured to receive an input voltage and supply an output voltage, the non-isolated power supply including a supply line, a return line, a first semiconductor switch coupled in series in the supply line, and a second semiconductor switch coupled in series in the return line, the first and second semiconductor switches each configured to operate in an ON state, in which electrical current flows through the first and second semiconductor switches, and an OFF state, in which electrical current does not flow through the first and second semiconductor switches; a differential current sensor configured to sense differential current between the supply line and the return line; and fault detection logic coupled to the differential current sensor, the first semiconductor switch, and the second semiconductor switch, the fault detection logic configured to:
detect when the differential current exceeds a predetermined current magnitude, and
command the first and second semiconductor switches to operate in the OFF state upon detecting that the differential current exceeds the predetermined current magnitude.

2 . The circuit of claim 1 , further comprising:
a return line current sensor configured to sense return line current, wherein the fault detection logic is further configured to:
detect when return line current exceeds a predetermined current value, and
command the first and second semiconductor switches to operate in the OFF state upon detecting that the return line current exceeds the predetermined current value.

3 . The circuit of claim 2 , wherein:
the differential current sensor comprises a Hall sensor; and the return line current sensor comprises a resistance coupled in series in the return line.

4 . The circuit of claim 2 , wherein the fault detection logic comprises:
a first comparator configured to detect when the differential current exceeds the predetermined current magnitude and supply a first output signal representative thereof; and a second comparator configured to detect when the return line current exceeds the predetermined current value and supply a second output signal representative thereof.

5 . The circuit of claim 4 , wherein the fault detection logic further comprises:
OR-logic coupled to the first and second comparators, the OR-logic configured, upon receipt of one or both of the first and second output signals, to command the first and second semiconductor switches to operate in the OFF state.

6 . The circuit of claim 1 , wherein the first and second semiconductor switches each comprise a transistor.

7 . The circuit of claim 1 , wherein the non-isolated power supply comprises:
a boost converter adapted to receive the input DC voltage and configured, upon receipt thereof, to supply a boosted DC voltage; and a buck stage converter coupled to receive the boosted DC voltage from the boost converter and configured, upon receipt thereof, to supply the output DC voltage.

8 . The circuit of claim 7 , wherein the buck stage converter comprises the first semiconductor switch.

9 . The circuit of claim 1 , further comprising:
a rectifier circuit adapted to receive an AC voltage and configured, upon receipt thereof, to supply the input DC voltage to the DC-DC converter.

10 . The circuit of claim 1 , further comprising:
a supply line current sensor configured to sense supply line current; and a return line current sensor configured to sense return line current, wherein the fault detection logic is further configured to:
detect when supply line current exceeds a predetermined supply line current value, and
detect when return line current exceeds a predetermined return line current value, and
command the first and second semiconductor switches to operate in the OFF state upon detecting that (i) the supply line current exceeds the predetermined supply line current value or (ii) the return line current exceeds the predetermined return line current value.

11 . The circuit of claim 10 , wherein the fault detection logic comprises:
a first comparator configured to detect when the differential current exceeds the predetermined current magnitude and supply a first output signal representative thereof; a second comparator configured to detect when the supply line current exceeds the predetermined supply line current value and supply a second output signal representative thereof; and a third comparator configured to detect when the return line current exceeds the predetermined supply return current value and supply a third output signal representative thereof.

12 . The circuit of claim 11 , wherein the fault detection logic further comprises:
OR-logic coupled to the first, second, and third comparators, the OR-logic configured, upon receipt of one or more of the first, second, and third output signals, to command the first and second semiconductor switches to operate in the OFF state.

13 . The circuit of claim 12 , wherein:
the differential current sensor comprises a Hall sensor; the supply line current sensor comprises a first resistance coupled in series in the supply line; and the return line current sensor comprises a resistance coupled in series in the return line.

14 . A non-isolated power supply, comprising:
a DC-DC converter adapted to receive an input DC voltage and supply an output DC voltage, the DC-DC converter including a boost stage, a buck stage, a supply line, a return line, a first semiconductor switch coupled in series in the supply line, and a second semiconductor switch coupled in series in the return line, the first and second semiconductor switches each configured to operate in an ON state, in which electrical current flows through the first and second semiconductor switches, and an OFF state, in which electrical current does not flow through the first and second semiconductor switches; a differential current sensor configured to sense differential current between the supply line and the return line; a return line current sensor configured to sense return line current; and fault detection logic coupled to the differential current sensor, the return line current sensor, the first semiconductor switch, and the second semiconductor switch, the fault detection logic configured to:
detect when the differential current exceeds a predetermined current magnitude,
detect when return line current exceeds a predetermined return line current value, and
command the first and second semiconductor switches to operate in the OFF state upon detecting that (i) the differential current exceeds the predetermined current magnitude or (ii) the return line current exceeds the predetermined current value.

15 . The non-isolated power supply of claim 14 , wherein:
the differential current sensor comprises a Hall sensor; and the return line current sensor comprises a resistance coupled in series in the return line.

16 . The non-isolated power supply of claim 14 , wherein the fault detection logic comprises:
a first comparator configured to detect when the differential current exceeds the predetermined current magnitude and supply a first output signal representative thereof; and a second comparator configured to detect when the return line current exceeds the predetermined current value and supply a second output signal representative thereof.

17 . The non-isolated power supply of claim 16 , wherein the fault detection logic further comprises:
OR-logic coupled to the first and second comparators, the OR-logic co

Assignees

• Honeywell Int Inc

Inventors

• Saxena Sunit Kumar
• Mahajan Deepak Bhimrao
• Saha Tarak
• Ravi Anand Vivek

Classifications

• H02M3/04

  by static converters · CPC title

• H02H3/08 Primary

  responsive to excess current (responsive to abnormal temperature caused by excess current H02H5/04) · CPC title

• H02M1/32 Primary

  Means for protecting converters other than automatic disconnection · CPC title

• H05B47/26

  Circuit arrangements for protecting against earth faults · CPC title

• H02H7/1213 Primary

  for DC-DC converters · CPC title