Spectral Stitching Method to Increase Instantaneous Bandwidth in Vector Signal Generators

US2016113013A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016113013-A1
Application numberUS-201514611700-A
CountryUS
Kind codeA1
Filing dateFeb 2, 2015
Priority dateOct 15, 2014
Publication dateApr 21, 2016
Grant date

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Abstract

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Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of phase and magnitude are preserved through the regions of overlap. The adjustment of gain and phase may be accomplished by a complex multiply with a complex calibration constant. The calibration constant may be determined for each signal path by comparing the gain and phase of one or more calibration tones generated within each region of overlap. Each signal path may comprise a VSG to convert the respective signal to an analog signal, which may be combined to obtain a composite signal.

First claim

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We claim: 1 . A method for processing a digital signal using a plurality of parallel processing paths, the method comprising: providing to each of the parallel processing paths a respective component signal comprising a copy of at least a respective frequency band of the digital signal, each respective frequency band having a respective center frequency and having a respective region of overlap with at least one other respective frequency band, wherein the combination of the respective frequency bands comprises an aggregate frequency band having an aggregate center frequency, wherein the respective center frequency of each respective frequency band has a respective frequency offset from the aggregate center frequency, wherein at least a portion of each of the parallel processing paths is phase-locked and time-synchronized with respect to the other parallel processing paths; at each of the parallel processing paths, processing the respective component signal, wherein said processing comprises: frequency-shifting at least the respective frequency band of the respective component signal such that the respective center frequency is shifted to baseband; filtering at least the respective frequency band of the respective component signal, wherein said filtering of the respective component signals is configured to cause a sum of the component signals to have a unity frequency response within each region of overlap; adjusting at least one of gain and phase of at least the respective frequency band of the respective component signal, wherein said adjusting at least one of gain and phase of the respective component signals is configured to cause the sum of the component signals to have a continuous frequency response over the aggregate frequency band; and converting at least the respective frequency band of the respective component signal to a respective analog signal using a respective vector signal generator associated with the respective parallel processing path; and combining the respective analog signals to obtain a composite signal. 2 . The method of claim 1 , wherein said converting the respective component signal comprises sampling at least a portion of the signal corresponding to the respective frequency band. 3 . The method of claim 1 , wherein said converting the respective component signal is configured to cause the aggregate center frequency to be located at a desired carrier frequency, and each respective center frequency to be offset from the desired carrier frequency by the respective frequency offset. 4 . The method of claim 1 , wherein said processing further comprises decimating at least the respective frequency band of the respective component signal to a rate that is less than or equal to a maximum sample rate of the respective vector signal generator. 5 . The method of claim 4 , wherein said filtering is performed by a digital filter after said decimating and before said adjusting at least one of gain and phase. 6 . The method of claim 5 , wherein the digital filter is a half-band filter. 7 . An apparatus for processing a digital signal, the apparatus comprising: a processing element comprising a plurality of parallel processing paths, wherein the digital signal processor is configured to provide to each of the parallel processing paths a respective component signal comprising a copy of at least a respective frequency band of the digital signal, each respective frequency band having a respective center frequency and having a respective region of overlap with at least one other respective frequency band, wherein the combination of the respective frequency bands comprises an aggregate frequency band having an aggregate center frequency, wherein the respective center frequency of each respective frequency band has a respective frequency offset from the aggregate center frequency, and wherein each of the parallel processing paths is configured to: frequency-shift at least the respective frequency band of the respective component signal such that the respective center frequency is shifted to baseband; filter at least the respective frequency band of the respective component signal, wherein said filtering of the respective component signals is configured to cause a sum of the component signals to have a unity frequency response within each region of overlap; and adjust gain and phase of at least the respective frequency band of the respective component signal, wherein said adjusting gain and phase of the respective component signals is configured to cause the sum of the component signals to have a continuous frequency response over the aggregate frequency band; a plurality of output ports, each configured to provide to a respective vector signal generator (VSG) an output of one of the plurality of parallel processing paths; a plurality of input ports, each of the input ports configured to receive from a respective VSG a respective analog signal comprising an analog version of the output of the respective one of the plurality of output ports; and a signal combiner configured to combine the respective analog signals to obtain a composite signal. 8 . The apparatus of claim 7 , wherein each of the parallel signal processing paths is further configured to: decimate at least the respective frequency band of the respective component signal to a rate that is less than or equal to a maximum sample rate of the respective vector signal generator. 9 . The apparatus of claim 8 , wherein said filtering is performed by a digital filter after said decimating and before said adjusting gain and phase. 10 . The apparatus of claim 9 , wherein the digital filter is a half-band filter. 11 . The apparatus of claim 7 , wherein each respective analog signal received at one of the input ports has been frequency-shifted relative to the respective output of the respective output port, such that the aggregate center frequency is located at a desired carrier frequency, and each respective center frequency is offset from the desired carrier frequency by the respective frequency offset. 12 . A method for calibrating a signal processing system including at least a first vector signal generator (VSG) and a second VSG, the method comprising: providing to a first signal processing path comprising the first VSG a first digital component signal, the first digital component signal comprising a first frequency band within an aggregate frequency band of a digital input signal, the aggregate frequency band having an aggregate center frequency, and the first frequency band having a first center frequency at a first frequency offset from the aggregate center frequency; providing to a second signal processing path comprising the second VSG a second digital component signal, the second digital component signal comprising a second frequency band within the aggregate frequency band of the digital input signal, the second frequency band having a second center frequency at a second frequency offset from the aggregate center frequency, the second frequency band having a region of overlap with the first frequency band, the region of overlap containing a calibration tone, wherein the second VSG is phase-locked and time-synchronized with respect to the first VSG; frequency shifting each of the first and second component signals, such that the first center frequency and the second center frequency are each shifted to baseband; converting the first and second digital component signals to first and second analog component signals, respectively, using the first VSG and the second VSG; computing a complex calibration constant based on a magnitude ratio and a phase difference, wherein the magnitud

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Classifications

  • for sampling · CPC title

  • using a sampling rate lower than twice the highest frequency component of the sampled signal (for demodulation of angle-modulated signals H03D3/006) · CPC title

  • using filters · CPC title

  • Resources in frequency domain, e.g. a carrier in FDMA · CPC title

  • Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00) · CPC title

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What does patent US2016113013A1 cover?
Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of…
Who is the assignee on this patent?
Nat Instr Corp
What technology area does this patent fall under?
Primary CPC classification H04W72/0453. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 21 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).